Datasheet

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LTC4307

4307f

Low Offset Hot Swappable

2-Wire Bus Buffer with Stuck

Bus Recovery

The LTC

4307 hot swappable, 2-wire bus buffer allows

I/O card insertion into a live backplane without corrup-

tion of the data and clock busses. The LTC4307 provides

bidirectional buffering, keeping the backplane and card

capacitances isolated. Low offset and high V

tolerance

allows multiple devices to be cascaded on the clock and

data busses. If SDAOUT or SCLOUT are low for 30ms, the

LTC4307 will automatically break the bus connection. At

this time the LTC4307 automatically generates up to 16

clock pulses on SCLOUT in an attempt to free the bus. A

connection will resume if the stuck bus is cleared.

During insertion, the SDA and SCL lines are pre-charged

to 1V to minimize bus disturbances. When driven high,

the ENABLE input allows the LTC4307 to connect after a

stop bit or bus idle. Driving ENABLE low breaks the con-

nection between SDAIN and SDAOUT, SCLIN and SCLOUT.

READY is an open-drain output which indicates that the

backplane and card sides are connected.

■

Live Board Insertion

■

Servers

■

Capacitance Buffer/Bus Extender

■

RAID Systems

■

ATCA

■

Bidirectional Buffer with Stuck Bus Recovery

■

60mV Buffer Offset Independent of Load

■

30ms Stuck Bus Timeout

■

Compatible with Non-Compliant V

C Devices

■

Prevents SDA and SCL Corruption During Live

Board Insertion and Removal from Backplane

■

±5kV Human Body Model ESD Protection

■

Isolates Input SDA and SCL Line from Output

■

Compatible with I

, I

C Fast Mode and SMBus

■

READY Open-Drain Output

■

1V Precharge on All SDA and SCL Lines

■

High Impedance SDA, SCL Pins for V

= 0V

■

Small 8-Lead (3mm × 3mm) DFN and 8-Lead MSOP

Packages

APPLICATIO S

FEATURES

DESCRIPTIO

TYPICAL APPLICATIO

3.3V

ENABLE

10k

LTC4307

SCLIN

SDAIN

SCLOUT

SDAOUT

READY

GND

BACKPLANE

CONNECTOR

10k 2.7k 10k 10k 0.01μF

CARD_SCL

CARD_SDA

10k

100k

3.3V

ENABLE

LTC4307

SCLIN

SDAIN

SCLOUT

SDAOUT

READY

GND

CARD

10k

4307 TA01a

3.3V

2.7k

MICRO-

CONTROLLER

CARD

CONNECTOR

0.01μF

100ns/DIV

0 100 200 300 400 600500

200mV/DIV

200

400

600

800

1000

4307 TA01b

SDAOUT

SDAIN

LOW

OFFSET

Rising Edge from Asserted Low

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents, including 7032051, 6356140, 6650174

Summary of content (16 pages)

PAGE 1
LTC4307 Low Offset Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery U FEATURES DESCRIPTIO ■ The LTC®4307 hot swappable, 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. The LTC4307 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Low offset and high VOL tolerance allows multiple devices to be cascaded on the clock and data busses.
PAGE 2
LTC4307 U W W W ABSOLUTE AXI U RATI GS (Notes 1, 7) VCC to GND ................................................. – 0.3V to 6V SDAIN, SCLIN, SDAOUT, SCLOUT, READY, ENABLE .......................................... –0.3V to 6V Maximum Sink Current (SDAIN, SCLIN, SDAOUT, SCLOUT, READY) .............................................. 50mA Operating Temperature Range LTC4307C ................................................ 0°C to 70°C LTC4307I .............................................
PAGE 3
LTC4307 ELECTRICAL CHARACTERISTICS The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VCC = 3.3V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Propagation Delay and Rise-Time Accelerators tPHL SDA/SCL Propagation Delay High to Low CLOAD = 50pF, 2.7k to VCC on SDA, SCL, VCC = 3.3V (Notes 2, 3) (Figure 1) 70 ns tPLH SDA/SCL Propagation Delay Low to High CLOAD = 50pF, 2.
PAGE 4
LTC4307 TIMING DIAGRAMS ENABLE, CONNECT, READY Timing tPHL_READY tPHL_EN tPLH_READY tPLH_EN ENABLE CONNECT READY 4307 TD01 Rising and Falling Propagation Delay and Rise and Fall Times for SDAIN, SDAOUT and SCLIN, SCLOUT tRISE tPLH tPHL tRISE tFALL tFALL SDAIN/SCLIN SDAOUT/SCLOUT 4307 TD02 Figure 1.
PAGE 5
LTC4307 U W TYPICAL PERFOR A CE CHARACTERISTICS ICC vs Temperature TA = 25°C, VCC = 3.3V, unless otherwise indicated. ISD vs Temperature IPULLUPAC vs Temperature 20 8.3 950 VCC = 5.5V 8.0 16 7.1 6.8 VCC = 2.3V 6.5 12 ISD (μA) IPULLUPAC (mA) VCC = 3.3V VCC = 3.3V 8 4 850 VCC = 3.3V 800 750 VCC = 2.3V 6.
PAGE 6
LTC4307 U U U PI FU CTIO S ENABLE (Pin 1): Connection Enable Input. This is a 1.4V digital threshold input pin. For normal operation pull or tie ENABLE high. Driving ENABLE below 0.8V isolates SDAIN from SDAOUT, SCLIN from SCLOUT and asserts READY low. A rising edge on ENABLE after a fault has occurred forces a connection between SDAIN, SDAOUT and SCLIN, SCLOUT. Connect to VCC if unused. connection sequence described in the Operation section has not been completed.
PAGE 7
LTC4307 W BLOCK DIAGRA Low Offset 2-Wire Bus Buffer with Stuck Low Timeout 8mA 8mA CONNECT IBOOSTSDA 6 VCC 8 IBOOSTSDA SDAIN SDAOUT SLEW RATE DETECTOR 7 SLEW RATE DETECTOR 100k 100k CONNECT PRECHARGE 100k PC_CONNECT PC_CONNECT 8mA CONNECT IBOOSTSCL 3 100k 8mA IBOOSTSCL SCLIN SCLOUT SLEW RATE DETECTOR 2 SLEW RATE DETECTOR + CONNECT – 0.55VCC 30ms TIMER + + 0.55VCC – IBOOSTSCL IBOOSTSDA + – 0.55VCC LOGIC 0.55VCC – READY PC_CONNECT 1 ENABLE CONNECT 5 + 1.
PAGE 8
LTC4307 OPERATION moment of connection, therefore minimizing the amount of disturbance caused by the I/O card. Once the LTC4307 comes out of UVLO, it monitors both the backplane and card sides for either a stop bit or bus idle condition to indicate the completion of data transactions. When both sides are idle or one side has a stop bit condition while the other is idle, the input-to-output connection circuitry is activated, joining the SDA and SCL busses on the I/O card with those on the backplane.
PAGE 9
LTC4307 OPERATION OUTPUT SIDE 50pF 1V/DIV INPUT SIDE 150pF 1V/DIV 200ns/DIV INPUT SIDE 150pF 1V/DIV 4307 F02 Figure 2. Input-Output Rising Edge Waveforms Bus Stuck Low Timeout When SDAOUT or SCLOUT is low, an internal timer is started. The timer is only reset by that respective input going high. If it does not go high within 30ms (typical) the connection between SDAIN and SDAOUT, and between SCLIN and SCLOUT is broken.
PAGE 10
LTC4307 APPLICATIONS INFORMATION Live Insertion and Capacitance Buffering Application Figures 4 and 5 illustrate applications of the LTC4307 that take advantage of the LTC4307’s Hot SwapTM , capacitance buffering and precharge features. If the I/O cards were plugged directly into the backplane without the LTC4307 buffer, all of the backplane and card capacitances would add directly together, making rise-time and fall-time requirements difﬁcult to meet.
PAGE 11
LTC4307 APPLICATIONS INFORMATION The ENABLE pin is driven using a short pin. This is to ensure that a connection is not enabled until the transients associated with live insertion have settled. Figure 5 shows the LTC4307 in an application where all of the pins have the same length. In this application a resistor is used to hold the ENABLE pin low during live insertion, until the backplane control circuitry can enable the device.
PAGE 12
LTC4307 APPLICATIONS INFORMATION Systems with Supply Voltage Droop millivolts or more. This situation is modeled by a series resistor in the VCC line, as shown in Figure 8. For proper operation, make sure that the VCC(LTC4307) is ≥ 2.3V. In large 2-wire systems, the VCC voltages seen by devices at various points in the system can differ by a few hundred 3.3V C1 0.01μF R1 10k R2 10k R3 10k SDA1 SCL1 VCC LTC4307 ENABLE READY SDAIN SDAOUT SCLIN SCLOUT C2 0.
PAGE 13
LTC4307 TYPICAL APPLICATIONS High VIL Application 5V R1 1.8k R2 1.8k R3 200Ω R5 10k R6 10k ENABLE SCLIN TEMPERATURE SENSOR C1 0.01μF VCC R4 200Ω SCL SCLOUT LTC4307 SDAIN SDAOUT SDA 5V R7 10k READY GND READY 4307 TA02 Simpliﬁed ATCA IPMB Application SHELF MANAGER –48V DC/DC 3.3V R1 10k VCC ShMC C1 0.01μF R2 10k ENABLE ATCA BOARD –48V –48V R3 2.7k DC/DC C2 0.01μF R4 2.
PAGE 14
LTC4307 PACKAGE DESCRIPTION DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.38 ± 0.10 8 0.675 ±0.05 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) 3.00 ±0.10 (4 SIDES) PACKAGE OUTLINE 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 1203 0.25 ± 0.05 0.200 REF 0.50 BSC 2.38 ±0.05 (2 SIDES) 0.75 ±0.05 0.00 – 0.05 4 0.25 ± 0.05 1 0.50 BSC 2.38 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1.
PAGE 15
LTC4307 PACKAGE DESCRIPTION MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.889 ± 0.127 (.035 ± .005) 0.254 (.010) 8 7 6 5 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0.52 (.0205) REF 0° – 6° TYP GAUGE PLANE 5.23 (.206) MIN 1 3.20 – 3.45 (.126 – .136) 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.42 ± 0.038 (.0165 ± .0015) TYP 0.65 (.0256) BSC 1.10 (.043) MAX 2 3 4 0.86 (.034) REF 0.18 (.
PAGE 16
LTC4307 TYPICAL APPLICATION The LTC4307 in a Repeater Application. The LTC4307’s Low Offset Allows Cascading of Multiple Devices VCC R1 2.7k R2 2.7k SDA1 SCL1 C1 0.01mF VCC LTC4307 ENABLE READY SDAOUT SDAIN SCLOUT SCLIN R4 2.7k R3 10k R5 2.7k R6 10k C2 0.01mF VCC LTC4307 ENABLE READY SDAIN SDAOUT SCLIN SCLOUT GND R7 2.7k GND R8 2.7k C3 0.01mF R9 10k VCC LTC4307 ENABLE READY SDAIN SDAOUT SCLIN SCLOUT R10 2.7k R11 2.