Datasheet

LTC4311
10
4311fa
APPLICATIONS INFORMATION
t
2
= –13kΩ•400pF •
In
2.1V + 0.15V – 3.3V – 13kΩ•2.5mA
0.9V – 3.3V – 13kΩ•2.5mA
⎧
⎨
⎩
⎫
⎬
⎭
= 0.205µs
(20)
t
r
= t
1
+ t
2
= 0.515µs + 0.205µs = 0.72µs
(21)
t
f
= 293Ω•400pF •
In
2.1V + 0.15V
3.3V
•(13kΩ+300Ω)– 300Ω
0.8V – 0.15V
3.3V
•(13kΩ+300Ω)– 300Ω
⎧
⎨
⎪
⎩
⎪
⎫
⎬
⎪
⎭
⎪
= 0.156µs
(22)
The rise time meets the 1μs SMBus requirement and the
fall time meets the 0.3μs requirement. The V
OL
is satisfi ed
while meeting the minimum slew rate requirements, so R
P
is chosen to be 13kΩ. If the rise time was not met due to
a large t
1
, equation 6 can be used to calculate a maximum
value of R
P
that will meet the rise time requirements.
ACK Data Setup Time
Care must be taken in selecting the value of R
S
(in series
with the pull-down driver) to ensure that the data setup
time requirement for ACK (acknowledge) is fulfi lled. An
acknowledge is the host releasing the SDA line (pulling
high) at the end of the last bit sent and the slave device
pulling the SDA line low before the rising edge of the ACK
clock pulse.
The LTC4311 5mA pull-up current is activated when the
host releases the SDA line, allowing the voltage to rise
above the LTC4311’s comparator threshold (V
THR
). If
a slave device has a high value of R
S
, a longer time is
required for the slave device to pull SDA low before the
rising edge of the ACK clock pulse. To ensure suffi cient
data setup time for ACK, slave devices with high values
of R
S
should pull the SDA low earlier.
An alternative is the slave device can hold the SCL line low
until the SDA line reaches a stable state. Then, SCL can
be released to generate the ACK clock pulse.
Multiple LTC4311s in Parallel
In very heavily loaded systems, stronger pull up current
may be desired. Two LTC4311’s may be used in parallel
to increase the total pull up current to meet rise time
requirements.
Notes on Using the LTC4311 in LTC1694 Applications
Although the LTC1694 and LTC4311 are functionally similar
accelerators for I
2
C, SMBus, and other comparable open
drain/collector bus applications, the LTC4311 offers a lower
power, higher performance solution in a smaller package
as compared to the LTC1694. These and other differences
are listed in Table 1 and must be accounted for if using
the LTC4311 in LTC1694 applications.
Table 1. Differences Between LTC1694 and LTC4311
SPECIFICATION LTC1694 LTC4311 COMMENTS
Enable Pin (typ) N/A 1V Allows the LTC4311 to be Disabled, Consuming Less than 5μA
V
CC
2.7V – 6V 1.6V – 5.5V Lower Operating Supply Voltage for Low Voltage Systems
I
CC
(typ), BUS1, BUS2 High 60μA 26μA Lower Standby Current to Conserve Power
V
THRES
(typ) 0.65V Dependent on V
CC
Tighter, Higher Noise Margins and Improved Rise Times
I
PULL-UP
(typ) 2.2mA 5mA Stronger Slew-Limited Source Current for Slewing Higher Bus Capacitances
f
MAX
100kHz 400kHz Higher Operating Frequency for I
2
C’s Fast Mode Bus Specifi cation