Datasheet

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LTC4312

4312f

TYPICAL APPLICATION

DESCRIPTION

Pin-Selectable, 2-Channel,

2-Wire Multiplexer

with Bus Buffers

The LTC

4312 is a hot-swappable 2-channel 2-wire bus

multiplexer that allows one upstream bus to connect to

any combination of downstream busses or channels.

An individual enable pin controls each connection. The

LTC4312 provides bidirectional buffering, keeping the up-

stream bus capacitance isolated from the downstream bus

capacitances. The high noise margin allows the LTC4312

to be interoperable with I

C devices that drive a high V

(> 0.4V). The LTC4312 supports level translation between

1.5V, 1.8V, 2.5V, 3.3V and 5V busses. The hot-swappable

nature of the LTC4312 allows I/O card insertion into, and

removal from, a live backplane without corruption of the

data and clock busses.

If both data and clock are not simultaneously high at

least once in 45ms and DISCEN is high, a FAULT signal is

generated indicating a stuck bus low condition, the input

is disconnected from each enabled output channel and up

to 16 clocks are generated on the enabled downstream

busses. A three state ACC pin enables input and output

side rise time accelerators of varying strengths and sets

the V

IL,RISING

voltage.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. All other

trademarks are the property of their respective owners. Protected by U.S. Patents, including

6356140, 6650174, 7032051, 7478286.

FEATURES

APPLICATIONS

1:2 Multiplexer/Switch for 2-Wire Bus

Bidirectional Buffer for SDA and SCL Lines

High Noise Margin with V

= 0.3•V

ENABLE Pins Connect SDA and SCL Lines

Selectable Rise Time Accelerator Current and

Activation Voltage

Level Shift 1.5V, 1.8V, 2.5V, 3.3V and 5V Busses

Prevents SDA and SCL Corruption During Live Board

Insertion and Removal from Backplane

Stuck Bus Disconnect and Recovery

Compatible with I

C, I

C Fast Mode and SMBus

±4kV Human Body Model (HBM) ESD Ruggedness

14-Lead 4mm × 3mm DFN and 16-Lead MSOP

Packages

Telecommunications Systems Including ATCA

Address Expansion

Level Translator

Capacitance Buffers/Bus Extender

Live Board Insertion

PMBus

Rising Edge from Asserted Low

with Level Translation

LTC4312

GND

CC2

4314 TA01a

SCLOUT1

SDAOUT1

SCLOUT2

SDAOUT2

SCLOUT1

SDAOUT1

SCLOUT2

SDAOUT2

SCLIN

SDAIN

ENABLE1

ENABLE2

ACC

DISCEN

FAULT

SCLIN

SDAIN

ENABLE1

ENABLE2

3.3V

10k

FAULT

10k10k

0.01μF

3.3V 3.3V

10k10k

0.01μF

200ns/DIV

1V/DIV

4312 TA01b

SCLOUT1

+ C

SCLOUT2

= 100pF

SCLIN

= 50pF

SCLOUT2

SCLOUT1

SCLIN

3.3V

Summary of content (20 pages)

PAGE 1
LTC4312 Pin-Selectable, 2-Channel, 2-Wire Multiplexer with Bus Buffers DESCRIPTION FEATURES n n n n n n n n n n n The LTC®4312 is a hot-swappable 2-channel 2-wire bus multiplexer that allows one upstream bus to connect to any combination of downstream busses or channels. An individual enable pin controls each connection. The LTC4312 provides bidirectional buffering, keeping the upstream bus capacitance isolated from the downstream bus capacitances.
PAGE 2
LTC4312 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltage VCC, VCC2 ................................................. –0.3V to 6V Input Voltages ACC, DISCEN, ENABLE1-2 ....................... –0.3V to 6V Input/Output Voltages SDAIN, SCLIN, SCLOUT1-2, SDAOUT1-2, FAULT ................................. –0.3V to 6V Output DC Sink Currents FAULT.................................................................50mA Operating Ambient Temperature Range LTC4312C ................................................
PAGE 3
LTC4312 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VCC = VCC2 = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply/Start-Up VCC Input Supply Range l 2.9 5.5 V VDD, BUS 2-Wire Bus Supply Voltage l 2.25 5.5 V VCC2 Output Side Accelerator Supply Range l 2.25 5.5 V ICC Input Supply Current One or Both VENABLE1-2 = VCC = VCC2 = 5.
PAGE 4
LTC4312 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VCC = VCC2 = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS TYP MAX UNITS ILEAK Input Leakage Current DISCEN = ENABLE1-2 = 5.5V l MIN 0.
PAGE 5
LTC4312 TYPICAL PERFORMANCE CHARACTERISTICS ICC Enabled Current vs Supply Voltage TA = 25°C, VCC = 3.3V unless otherwise noted. ICC Disabled (ENABLE1-2 Low) Current vs Supply Voltage 8.0 Multiplexer Switch Resistance RMUX vs Temperature 3.0 10 VSDAIN, SCLIN = 0V VSDAIN, SCLIN = 0V IDS = 4mA 9 2.5 VCC2 = 3.3V 7.5 RMUX (Ω) ICC (mA) ICC (mA) 8 2.0 7.0 7 VCC2 = 5V 6 1.5 5 6.5 3 2 4 5 1.
PAGE 6
LTC4312 PIN FUNCTIONS ACC: Three-State Acceleration and Buffer Mode Selector. This pin controls the turn on voltage of the rise time accelerators and their current strength on both the input and output sides. It also controls the turn-off voltage of the buffers. See Table 1 in the Applications Information section. DISCEN: Disconnect Stuck Bus Enable Input. When this pin is high, stuck busses are automatically disconnected and FAULT is pulled low after a timeout period of 45ms.
PAGE 7
LTC4312 BLOCK DIAGRAM VCC VCC2 IRTA IRTA CO1 SCLIN SLEW RATE DETECTOR 0.2V/μs SCLOUT1 VCC2 IRTA CIN SLEW RATE DETECTOR 0.2V/μs VCC CO2 SCLOUT2 VCC2 IRTA IRTA MUX SDAIN DO1 SLEW RATE DETECTOR 0.2V/μs SLEW RATE DETECTOR 0.
PAGE 8
LTC4312 OPERATION The Block Diagram shows the major functional blocks of the LTC4312. The LTC4312 is a 1:2 multiplexer with capacitance buffering for I2C signals. Capacitance buffering is achieved by use of back to back buffers on the clock and data channels which isolate the SDAIN and SCLIN capacitances from the SDAOUT and SCLOUT capacitances respectively. All SDA and SCL pins are fully bidirectional. The high noise margin allows the LTC4312 to operate with I2C devices that drive a non-compliant high VOL.
PAGE 9
LTC4312 APPLICATIONS INFORMATION The LTC4312 is a 1:2 pin selectable I2C multiplexer that provides a high noise margin, capacitance buffering and level translation capability on its clock and data pins. Rise time accelerators accelerate rising edges to enable operation at high frequencies with heavy loads. These features are illustrated in the following subsections. Table 1.
PAGE 10
LTC4312 APPLICATIONS INFORMATION If VCC2 is tied low, the output side rise time accelerators are disabled independent of the state of the ACC pin. ACC tied high disables input and output RTAs. Using a combination of the ACC pin and the VCC2 voltage allows the user independent control of the input and output side rise time accelerators.
PAGE 11
LTC4312 APPLICATIONS INFORMATION 3.3V C1 0.01μF R1 10k 3.3V R2 10k VCC2 VCC SCLIN SCLIN SDAIN SDAIN R4 10k R5 10k C2 0.01μF ENABLE1 ENABLE1 SCLOUT1 SCLOUT1 ENABLE2 ENABLE2 SDAOUT1 SDAOUT1 R3 10k R6 10k ACC DISCEN FAULT 5V LTC4312 3.3V R7 10k SCLOUT2 SCLOUT2 SDAOUT2 SDAOUT2 FAULT GND 4312 F04 Figure 4. Connection of the LTC4312 in a Level Shift Application. VCC Is Less Than or Equal to the Minimum Bus Supply Voltages on the Output Side.
PAGE 12
LTC4312 APPLICATIONS INFORMATION or SDAIN is regulated to a logic low voltage as directed by equation 4 which uses SDA as an example: VSDAIN (V)= VSDAOUT + 45mV +10Ω • VDD,BUS RBUS Cascading LTC4312 Devices and Other LTC Bus Buffers Multiple LTC4312s can be cascaded or the LTC4312 may be cascaded with other LTC bus buffers as required by the application. This is shown for the data pathway in Figure 5 where an LTC4312 is cascaded with other LTC4312s and some select LTC bus buffers.
PAGE 13
LTC4312 APPLICATIONS INFORMATION the LTC4312 can be cascaded with the LTC4303 and LTC4307 if the LTC4312’s RTA turn-on voltage is set to be 0.8V (ACC low). The LTC4312 can be cascaded with the LTC4301 and LTC4301L under all ACC settings as these devices do not have RTAs. The LTC4312 can be cascaded with the LTC4302, LTC4304, LTC4305 and LTC4306 if the LTC4312’s RTAs are set to turn on at 0.8V (ACC low) or under all ACC settings if the RTAs on the other bus buffers are disabled.
PAGE 14
LTC4312 APPLICATIONS INFORMATION and output, asserting FAULT low and generating up to 16 clock pulses at 5.5kHz on the SCLOUT node common to the two channels. Should the stuck bus release high during this period, clock pulsing is stopped, a stop bit is generated and FAULT is cleared. In order for a connection to be established between the input and output, all ENABLEs have to be taken low followed by an assertion of the ENABLEs of the required channels.
PAGE 15
LTC4312 APPLICATIONS INFORMATION Demultiplexer Function Due to its bi-directional nature, the LTC4312 can be used as a demultiplexer. This is shown in Figure 9 where two channels are used to drive I2C data from the master side with redundancy to the slave side. In this application the SDAOUT/SCLOUT channels serve as the inputs while the SDAIN/SCLIN channel is the output. Redundancy on the master side provides protection against power supply failure.
PAGE 16
LTC4312 APPLICATIONS INFORMATION Hot-Swapping Figure 10 shows the LTC4312 in a typical hot-swapping application where the LTC4312 is on the backplane and I/O cards plug into the downstream channels. The outputs must idle high and the corresponding output channel must be disabled before an I/0 card can be plugged or unplugged from an output channel. Figure 10 also shows the use of a non-compliant I2C device with the LTC4312. The high noise margin of the LTC4312 supports logic low levels up to 0.
PAGE 17
LTC4312 APPLICATIONS INFORMATION Level Translating to Bus Voltages < 2.25V in order to meet the VIH = 0.7 • VDD,BUS requirement and not impact the high side noise margin. Users willing to live with a lower logic high noise margin can level translate down to 1.5V. An example of voltage level translation from 3.3V to 1.8V is illustrated in Figure 11, where a 3.3V input voltage level is translated to a 1.8V output voltage level on channel 1. Tying VCC to 3.3V satisﬁes equation 5.
PAGE 18
LTC4312 PACKAGE DESCRIPTION DE Package 14-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1708 Rev B) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 3.00 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.115 TYP 4.00 ±0.10 (2 SIDES) R = 0.05 TYP 3.00 ±0.10 (2 SIDES) 8 0.40 ± 0.10 14 3.30 ±0.10 1.70 ± 0.10 PIN 1 NOTCH R = 0.20 OR 0.
PAGE 19
LTC4312 PACKAGE DESCRIPTION MS Package 16-Lead Plastic MSOP (Reference LTC DWG # 05-08-1669 Rev Ø) 0.889 p 0.127 (.035 p .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.305 p 0.038 (.0120 p .0015) TYP 4.039 p 0.102 (.159 p .004) (NOTE 3) 0.50 (.0197) BSC 0.280 p 0.076 (.011 p .003) REF 16151413121110 9 RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) DETAIL “A” 3.00 p 0.102 (.118 p .004) (NOTE 4) 4.90 p 0.152 (.193 p .006) 0o – 6o TYP GAUGE PLANE 0.53 p 0.152 (.021 p .006) DETAIL “A” 0.18 (.
PAGE 20
LTC4312 TYPICAL APPLICATION Level Translating 2.5V, 3.3V and 5V Busses and Operation with a Non-Compliant I2C Device 3.3V C1 0.01μF 5V R2 10k R1 10k VCC2 VCC R3 10k R4 10k C2 0.01μF SCLIN SDAIN ENABLE1 SCLOUT1 SCLOUT1 ENABLE2 SDAOUT1 SDAOUT1 LTC4312 2.5V 3.3V R5 10k ACC DISCEN NON-COMPLIANT I2C DEVICE VOL = 0.