Datasheet

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LTC4314

4314f

TYPICAL APPLICATION

DESCRIPTION

Pin-Selectable, 4-Channel,

2-Wire Multiplexer

with Bus Buffers

The LTC

4314 is a hot-swappable 4-channel 2-wire bus

multiplexer that allows one upstream bus to connect to

any combination of downstream busses or channels.

An individual enable pin controls each connection. The

LTC4314 provides bidirectional buffering, keeping the up-

stream bus capacitance isolated from the downstream bus

capacitances. The high noise margin allows the LTC4314

to be interoperable with I

C devices that drive a high V

(> 0.4V). The LTC4314 supports level translation between

1.5V, 1.8V, 2.5V, 3.3V and 5V busses. The hot-swappable

nature of the LTC4314 allows I/O card insertion into, and

removal from, a live backplane without corruption of the

data and clock busses.

If both data and clock are not simultaneously high at

least once in 45ms and DISCEN is high, a FAULT signal is

generated indicating a stuck bus low condition, the input

is disconnected from all enabled output channels, and up

to 16 clocks are generated on the enabled downstream

busses. A three state ACC pin enables input and output

side rise time accelerators of varying strengths and sets

the V

IL,RISING

voltage.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot Swap

is a trademark of Linear Technology Corporation. All other trademarks are the property of their

respective owners. Protected by U.S. Patents, including 6356140, 6650174, 7032051, 7478286.

FEATURES

APPLICATIONS

1:4 Multiplexer/Switch for 2-Wire Bus

Bidirectional Buffer for SDA and SCL Lines

High Noise Margin with V

= 0.3•V

ENABLE Pins Connect SDA and SCL Lines

Selectable Rise Time Accelerator Current and

Activation Voltage

Level Shift 1.5V, 1.8V, 2.5V, 3.3V and 5V Busses

Prevents SDA and SCL Corruption During Live Board

Insertion and Removal from Backplane

Stuck Bus Disconnect and Recovery

Compatible with I

C, I

C Fast Mode and SMBus

±4kV Human Body Model (HBM) ESD Ruggedness

20-Lead SSOP and 3mm × 4mm QFN Packages

Telecommunications Systems Including ATCA

Address Expansion

Level Translator

Capacitance Buffers/Bus Extender

Live Board Insertion

PMBus

Rising Edge from Asserted Low

with Level Translation

LTC4314

GND

CC2

4314 TA01a

SCLOUT1

SDAOUT1

SCLOUT4

SDAOUT4

SCLOUT1

SDAOUT1

SCLOUT4

SDAOUT4

SCLIN

SDAIN

ENABLE1

ENABLE2

ENABLE3

ENABLE4

ACC

DISCEN

FAULT

SCLIN

SDAIN

ENABLE1

ENABLE2

ENABLE3

ENABLE4

3.3V

10k

FAULT

10k10k

0.01μF

3.3V 3.3V

10k10k

•••

0.01μF

200ns/DIV

1V/DIV

4314 TA01b

SCLOUT1

+ C

SCLOUT4

= 100pF

SCLIN

= 50pF

SCLOUT4

SCLOUT1

SCLIN

3.3V

Summary of content (20 pages)

PAGE 1
LTC4314 Pin-Selectable, 4-Channel, 2-Wire Multiplexer with Bus Buffers DESCRIPTION FEATURES n n n n n n n n n n n The LTC®4314 is a hot-swappable 4-channel 2-wire bus multiplexer that allows one upstream bus to connect to any combination of downstream busses or channels. An individual enable pin controls each connection. The LTC4314 provides bidirectional buffering, keeping the upstream bus capacitance isolated from the downstream bus capacitances.
PAGE 2
LTC4314 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltages VCC, VCC2 ................................................. –0.3V to 6V Input Voltages ACC, DISCEN, ENABLE1-4 ....................... –0.3V to 6V Input/Output Voltages SDAIN, SCLIN, SCLOUT1-4, SDAOUT1-4, FAULT ................................. –0.3V to 6V Output DC Sink Currents FAULT.................................................................50mA Operating Ambient Temperature Range LTC4314C ...............................................
PAGE 3
LTC4314 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VCC = VCC2 = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply/Start-Up VCC Input Supply Voltage l 2.9 5.5 V VDD, BUS 2-Wire Bus Supply Voltage l 2.25 5.5 V VCC2 Output Side Accelerator Supply Voltage l 2.25 5.5 V ICC Input Supply Current One or More VENABLE1-4 = VCC = VCC2 = 5.
PAGE 4
LTC4314 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VCC = VCC2 = 3.3V unless otherwise noted. SYMBOL PARAMETER tLH_EN ENABLE1-4 High to Buffer Active ILEAK Input Leakage Current IACC(IN, HL) CONDITIONS TYP MAX l MIN 0.56 1 UNITS μs DISCEN = ENABLE1–4 Pins = 5.5V l 0.
PAGE 5
LTC4314 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VCC = 3.3V unless otherwise noted. ICC Disabled (ENABLE1-4 Low) Current vs Supply Voltage ICC Enabled Current vs Supply Voltage 8.0 Multiplexer Switch Resistance RMUX vs Temperature 10 3.0 VSDAIN, SCLIN = 0V IDS = 4mA VSDAIN, SCLIN = 0V 9 VCC2 = 3.3V 2.5 8 RMUX (Ω) ICC (mA) ICC (mA) 7.5 2.0 7 VCC2 = 5V 6 7.0 1.5 5 6.5 3 2 4 5 1.0 6 3 2 4 VCC (V) 5 VCC (V) 4314 G01 250 VCC = VCC2 = 3.
PAGE 6
LTC4314 PIN FUNCTIONS ACC: Three-State Acceleration and Buffer Mode Selector. This pin controls the turn on voltage of the rise time accelerators and their current strength on both the input and output sides. It also controls the turn-off voltage of the buffers. See Table 1 in the Applications Information section. DISCEN: Disconnect Stuck Bus Enable Input. When this pin is high, stuck busses are automatically disconnected and FAULT is pulled low after a timeout period of 45ms.
PAGE 7
LTC4314 BLOCK DIAGRAM VCC IRTA VCC2 IRTA CO1 SCLIN SCLOUT1 VCC2 CIN SLEW RATE DETECTOR 0.2V/μs VCC t t t t t t SLEW RATE DETECTOR 0.2V/μs IRTA CO4 IRTA SCLOUT4 VCC2 MUX IRTA SDAIN DO1 DIN SDAOUT1 VCC2 t t t t t t SLEW RATE DETECTOR 0.2V/μs SLEW RATE DETECTOR 0.
PAGE 8
LTC4314 OPERATION The Block Diagram shows the major functional blocks of the LTC4314. The LTC4314 is a 1:4 multiplexer with capacitance buffering for I2C signals. Capacitance buffering is achieved by use of back to back buffers on the clock and data channels which isolate the SDAIN and SCLIN capacitances from the SDAOUT and SCLOUT capacitances respectively. All SDA and SCL pins are fully bidirectional. The high noise margin allows the LTC4314 to operate with I2C devices that drive a non-compliant high VOL.
PAGE 9
LTC4314 APPLICATIONS INFORMATION The LTC4314 is a 1:4 pin selectable I2C multiplexer that provides a high noise margin, capacitance buffering and level translation capability on its clock and data pins. Rise time accelerators accelerate rising edges to enable operation at high frequencies with heavy loads. These features are illustrated in the following subsections.
PAGE 10
LTC4314 APPLICATIONS INFORMATION If VCC2 is tied low, the output side rise time accelerators are disabled independent of the state of the ACC pin. Using a combination of the ACC pin and the VCC2 voltage allows the user independent control of the input and output side rise time accelerators.
PAGE 11
LTC4314 APPLICATIONS INFORMATION 3.3V C1 0.01μF R1 10k 3.3V R2 10k VCC2 VCC SCLIN SCLIN SDAIN SDAIN R4 10k R5 10k C2 0.01μF ENABLE1 ENABLE1 SCLOUT1 SCLOUT1 ENABLE2 ENABLE2 SDAOUT1 SDAOUT1 ENABLE3 ENABLE3 3.3V R3 10k LTC4314 • • • • • • ENABLE4 ENABLE4 5V R6 10k ACC DISCEN R7 10k SCLOUT4 SCLOUT4 SDAOUT4 SDAOUT4 FAULT FAULT GND 4314 F04 Figure 4. Connection of the LTC4314 in a Level Shift Application.
PAGE 12
LTC4314 APPLICATIONS INFORMATION turn-off voltage, signals will not be propagated across the cascade. Also the minimum rise time accelerator (RTA) turn-on voltage (wherever applicable) of each device in the cascade should also be greater than the maximum buffer turn-off voltage of all the devices in the cascade. This condition is required to prevent contention between one device’s buffer and another’s RTA.
PAGE 13
LTC4314 APPLICATIONS INFORMATION Paralleling LTC4314 Devices The LTC4314s can be paralleled to perform higher order multiplexing. Figure 6 shows a 1:8 multiplexer with two LTC4314s. 3.3V C1 0.01μF R1 10k R2 10k 3.3V VCC2 VCC R4 10k R5 10k C2 0.01μF SCLIN I2C DEVICE SDAIN ENABLE1 SCLOUT1 SCLOUT1 ENABLE2 ENABLE2 SDAOUT1 SDAOUT1 ENABLE3 ENABLE3 ENABLE4 ENABLE4 LTC4314 • • • • • • ENABLE1 ACC 3.3V R3 10k DISCEN 5V R6 10k R7 10k SCLOUT4 SCLOUT4 SDAOUT4 SDAOUT4 FAULT GND 3.
PAGE 14
LTC4314 APPLICATIONS INFORMATION Radial Telecommunications Figure 7 shows the use of the LTC4314 in a radial telecommunications application. Two shelf managers are wired to communicate with slave I2C devices for redundancy. Each shelf manager can have as many LTC4314s as required depending on the number of boards in the system and the desired radial/star conﬁguration. The ENABLE pins of the LTC4314s inside only one shelf manager are asserted high at any time.
PAGE 15
LTC4314 APPLICATIONS INFORMATION and output, asserting FAULT low and generating up to 16 clock pulses at 5.5kHz on the SCLOUT node common to the four channels. Should the stuck bus release high during this period, clock pulsing is stopped, a stop bit is generated and FAULT ﬂag is cleared. In order for a connection to be established between the input and output, all ENABLES have to be taken low followed by an assertion of the ENABLES of the required channels.
PAGE 16
LTC4314 APPLICATIONS INFORMATION Demultiplexer Function Due to its bi-directional nature, the LTC4314 can be used as a demultiplexer. This is shown in Figure 10 where two channels are used to drive I2C data from the master side with redundancy to the slave side. In this application the SDAOUT/SCLOUT channels serve as the inputs while the SDAIN/SCLIN channel is the output. Redundancy on the master side provides protection against power supply failure.
PAGE 17
LTC4314 APPLICATIONS INFORMATION 3.3V to 1.8V is illustrated in Figure 12, where a 3.3V input voltage level is translated to a 1.8V output voltage level on channel 1. Tying VCC to 3.3V satisﬁes equation 5. Grounding VCC2 disables the RTA on the low voltage channel. VMIN defaults to VCC under these conditions, making the buffer turn off voltage 0.99V. Channels 2-4 must be disabled when channel 1 is enabled. A similar voltage translation can also be performed going from a 3.
PAGE 18
LTC4314 PACKAGE DESCRIPTION GN Package 20-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .337 – .344* (8.560 – 8.738) .045 p.005 20 19 18 17 16 15 14 13 12 .254 MIN .150 – .165 .0165 p.0015 11 .229 – .244 (5.817 – 6.198) .058 (1.473) REF .150 – .157** (3.810 – 3.988) .0250 BSC 1 RECOMMENDED SOLDER PAD LAYOUT .015 p .004 s 45o (0.38 p 0.10) .0075 – .0098 (0.19 – 0.25) 2 3 4 5 6 7 8 .0532 – .0688 (1.35 – 1.75) 9 10 .004 – .0098 (0.102 – 0.249) 0o – 8o TYP .016 – .
PAGE 19
LTC4314 PACKAGE DESCRIPTION UDC Package 20-Lead Plastic QFN (3mm × 4mm) (Reference LTC DWG # 05-08-1742 Rev Ø) 0.70 p0.05 3.50 p 0.05 2.10 p 0.05 1.50 REF 2.65 p 0.05 1.65 p 0.05 PACKAGE OUTLINE 0.25 p0.05 0.50 BSC 2.50 REF 3.10 p 0.05 4.50 p 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.75 p 0.05 3.00 p 0.10 1.50 REF 19 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.25 s 45o CHAMFER 20 0.40 p 0.10 1 PIN 1 TOP MARK (NOTE 6) 2 2.65 p 0.10 4.00 p 0.10 2.
PAGE 20
LTC4314 TYPICAL APPLICATION 1:8 Multiplexer with Level Translation and Operation with a Non-Compliant I2C Device 3.3V C1 0.01μF R1 10k R2 10k 3.3V VCC2 VCC 3.3V R4 10k R5 10k C2 0.01μF C3 0.01μF SCLIN I2C DEVICE 3.3V VCC2 VCC R9 10k C4 0.01μF R10 10k SCLIN SDAIN SDAIN SCLOUT1 SCLOUT1 ENABLE5 ENABLE1 SCLOUT1 SCLOUT5 ENABLE2 ENABLE2 SDAOUT1 SDAOUT1 ENABLE6 ENABLE2 SDAOUT1 SDAOUT5 ENABLE3 ENABLE3 ENABLE7 ENABLE3 ENABLE4 ENABLE4 ENABLE8 ENABLE4 LTC4314 3.