Datasheet
LTC4314
15
4314f
APPLICATIONS INFORMATIONAPPLICATIONS INFORMATION
Nested Addressing
The LTC4314 can provide nested addressing when its
ENABLE pins are used as channel select bits. This is shown
in Figure 8 where the master communicates with slave
devices that have the same address by selectively enabling
only one output channel at a time. Since slaves have the
same address care must be taken that the master never
enables channels 1 and 4 at the same time.
Stop Bit Generation and FAULT Clocking
If the output bus sticks low (SCLOUT or SDAOUT stuck
low for at least 45ms) on one of the enabled channels
and DISCEN is high, the LTC4314 attempts to unstick the
bus by fi rst breaking the connection between the input
LTC4314
GND
V
CC
V
CC2
4314 F08
SCLOUT1
SDAOUT1
SCLOUT4
SDAOUT4
SCLIN
SDAIN
ENABLE1
ENABLE2
ENABLE3
ENABLE4
ACC
DISCEN
FAULT
ENABLE1
ENABLE2
ENABLE3
ENABLE4
3.3V
R3
10k
FAULT
R2
10k
R1
10k
C1
0.01μF
C2
0.01μF
3.3V 3.3V
R5
10k
R4
10k
ADDRESS = 1001 000
ADDRESS = 1001 000
5V
R7
10k
R6
10k
I
2
C
DEVICE
I
2
C
DEVICE
I
2
C
DEVICE
•••
•••
Figure 8. Nested Addressing
Figure 9. Bus Waveforms During a SDAOUT1
Stuck Low and Recovery Event
and output, asserting FAULT low and generating up to
16 clock pulses at 5.5kHz on the SCLOUT node common
to the four channels. Should the stuck bus release high
during this period, clock pulsing is stopped, a stop bit is
generated and FAULT fl ag is cleared. In order for a con-
nection to be established between the input and output, all
ENABLES have to be taken low followed by an assertion
of the ENABLES of the required channels. This process is
illustrated in Figure 9 for the case where only channel 1 is
active and SDAOUT1 starts out stuck low and then recov-
ers. If DISCEN is tied low and a stuck low event occurs,
the FAULT fl ag is driven low, but the connection between
the input and output is not broken and clock generation
is not done.
1ms/DIV
4314 F09
SCLOUT1
5V/DIV
SDAOUT1
5V/DIV
SDAIN
5V/DIV
ENABLE1
5V/DIV
CONNECT AT RISING EDGE OF ENABLE1
DISCONNECT
AT TIMEOUT
STUCK LOW>45ms
AUTOMATIC CLOCKING
DRIVEN LOWRECOVERS