Datasheet

LTC4415
12
4415fa
applicaTions inForMaTion
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be followed to ensure proper operation
of the LTC4415:
1. Connect the exposed pad of the package (Pin 17) directly
to a large PC board ground to minimize thermal imped-
ance. Correctly soldered to a 2500mm
2
double-sided 1oz
copper board, the DFN package has a thermal resistance
(θ
JA
) of approximately 43°C/W. Failure to make good
contact between the exposed pad on the backside of
the package and an adequately sized ground plane re-
sults in much larger thermal resistance, raising the die
temperature for given power dissipation. An example
layout for double layer board is given in Figure 4. Via
holes are used in the board under and near the device
to conduct heat away from the device to the bottom
layer.
2. The traces to the input supplies, outputs and their
decoupling capacitors should be short and wide to
minimize the impact of parasitic inductance. Connect
the GND side of the capacitors directly to the ground
plane of the board. The decoupling capacitors provide
the transient current to the internal power MOSFETs
and their drivers.
3. Minimize the parasitic capacitance on CLIM1 and CLIM2
pins for stable operation.
Figure 4. Example Board Layout for a Double-Sided PCB
EN1
IN1
IN2
OUT1
OUT2
4415 F04
CLIM1
CLIM2
WARN1
WARN2
STAT1
STAT2EN2