Datasheet

LTC6360
15
6360f
applicaTions inForMaTion
The amount that the loop gain and subsequent bandwidth
will be reduced is equal to this zero-pole ratio. For example,
for 20dB of loop gain reduction (one decade bandwidth
reduction), R
FILT
should be made equal to 5Ω.
Figure 8 shows the open loop gain without compensation
and with a 10Ω/330pF RC compensation network. The
pole-zero can be seen to reduce the open loop gain above
10MHz, stabilizing the amplifier for unity gain applications.
This sets a lower limit on CL of:
C
FILT
> (f
Z
/ f
P
• NG)/(2πR
FILT
f
C(AMP)
) (8)
Note that for large zero-pole ratios, additional margin
may be needed. In this case, setting f
Z
equal to f
C
yields
a phase margin of at best 45°. In practice, the ampli-
fier’s higher order poles will further reduce the phase
margin below 45°. Therefore, f
Z
should be made lower
than f
C
in order to ensure adequate phase margin. Phase
margin in the case of large pole-zero ratios case can
be estimated as tan
–1
(f
C
/f
Z
).
Likewise for small zero-pole ratios, the pole will not
have contributed a full 90° of lagging phase prior to the
zero contributing leading phase. The requirement for
f
Z
being lower than f
C
can be relaxed in these cases.
3. Select R
FILT
and C
FILT
to yield the desired filter bandwidth
while meeting the two constraints listed above.
The layout of the filter RC network is critical to the stability
of the part and care should be taken to minimize parasitic
inductance in this path.
Table 1 lists suggested RC filter values for some common
circuit gains. Note that longer filter time constants can be
implemented by increasing the C
FILT
value beyond what is
shown in Table 1 without degrading stability. For large C
FILT
values, it may be necessary to use multiple high quality
surface mount capacitors to reduce ESR and maintain a
high self resonant frequency.
Table 1. Component Values for Various Circuit Gains
Noise Gain (NG) R
F
C
F
R
G
R
FILT
C
FILT
1 0 DNI DNI 10 330pF
2 2k 2pF 2k 25 150pF
5 2k 0.2pF 500 DNI DNI
10 2k DNI 222 DNI DNI
20 2k DNI 181 DNI DNI
DNI – Do Not Install
Interfacing the LTC6360 to A/D Converters
When driving an ADC, a single-pole RC filter between
the output of the LTC6360 and the input of the ADC can
improve system performance. The sampling process
of ADCs creates a charge transient at the ADC input
The following is a guideline for designing the RC filter to
ensure stability with a circuit gain less than five:
1. In order to sufficiently reduce the gain prior to the
unity loop gain crossover point, f
C
, the zero-pole ratio
should be greater than 5/NG, where NG is the circuit
noise gain. For example, based on Equation 5, a unity
gain configuration allows a maximum R
FILT
value of
11.25Ω.
2. The zero should be located below to the unity gain
crossover frequency, f
C
. Once the RC network is in-
troduced, f
C
will occur at a lower frequency given by:
f
C
= f
C(AMP)
/(f
Z
/ f
P
• NG) (6)
where f
C(AMP)
is the unity gain-bandwidth of the amplifier
without the RC network. Thus, the following condition
should be met:
f
Z
< f
C(AMP)
/(f
Z
/ f
P
• NG) (7)
where f
C(AMP)
is approximately 1GHz.
Figure 8. Open Loop Gain and Phase with and without
Output Compensation
FREQUENCY (Hz)
10 1k 10k 100k 1M 10M 100M
GAIN (dB)
PHASE (DEG)
100 1G
6360 F08
120
100
–20
140
80
60
40
20
0
135
90
–180
180
45
0
–45
–90
–135
PHASE UNCOMPENSATED
UNCOMPENSATED
10Ω/330pF
COMPENSATED
10Ω/330pF
COMPENSATED
GAIN