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LTC6420-20

642020fb

FEATURES

APPLICATIONS

DESCRIPTION

Dual Matched

1.8GHz Differential

Ampliﬁ ers/ADC Drivers

The LTC

6420-20 is a dual high-speed differential ampliﬁ er

targeted at processing signals from DC to 300MHz. The

part has been speciﬁ cally designed to drive 12-, 14- and

16-bit ADCs with low noise and low distortion, but can also

be used as a general-purpose broadband gain block.

The LTC6420-20 is easy to use, with minimal support

circuitry required. The output common mode voltage

is set using an external pin, independent of the inputs,

which eliminates the need for transformers or AC-coupling

capacitors in many applications. The gain is internally

ﬁ xed at 20dB (10V/V).

The LTC6420-20 saves space and power compared to

alternative solutions using IF gain blocks and transformers.

The LTC6420-20 is packaged in a compact 20-lead

3mm × 4mm QFN package and operates over the –40°C

to 85°C temperature range.

Distribution of Gain Match

Matched Gain ±0.1dB

Matched Phase ±0.1° at 100MHz

Channel Separation 80dB at 100MHz

1.8GHz –3dB Bandwidth; Fixed Gain of 10V/V (20dB)

IMD3 = –84dBc at 100MHz, 2V

P-P

Equivalent OIP3 = 46dBm at 100MHz

1nV/√Hz Internal Op Amp Noise

6.2dB Noise Figure

Differential Inputs and Outputs

Rail-to-Rail Output Swing

80mA Supply Current (240mW) per Ampliﬁ er

1.1V to 1.6V Output Common Mode Voltage,

Adjustable

DC- or AC-Coupled Operation

20-Lead 3mm × 4mm × 0.75mm QFN Package

Differential ADC Driver

Single Ended to Differential Conversion

IF Sampling (Diversity) Receivers

Broadband I/Q Ampliﬁ ers

Satellite Communications

Matched Dual Ampliﬁ er with Output Common Mode Biasing

TYPICAL APPLICATION

CHANNEL-TO-CHANNEL GAIN MATCH (dB)

–0.25

UNITS (%)

–0.15 –0.05

642020 TA01b

0.05 0.15 0.25

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

642020 TA01a

0.1µF

+OUT A

–OUT A

–IN A

+IN A

0.1µF

100Ω

12.5Ω

1000Ω

0.1µF

–OUT B

+OUT B

+IN B

–IN B

0.1µF

100Ω

12.5Ω

1000Ω

0.1µF

1000pF

0.1µF

1000pF

V+ A

OCM

ENABLEA

V+ B V

OCM

ENABLEB

= 200Ω

OCM

±0.1dB GAIN MATCHING

±0.1° PHASE MATCHING AT 100MHz

V– V–

LTC6420-20

–

Summary of content (14 pages)

PAGE 1
LTC6420-20 Dual Matched 1.8GHz Differential Amplifiers/ADC Drivers DESCRIPTION FEATURES n n n n n n n n n n n n n n Matched Gain ±0.1dB Matched Phase ±0.1° at 100MHz Channel Separation 80dB at 100MHz 1.8GHz –3dB Bandwidth; Fixed Gain of 10V/V (20dB) IMD3 = –84dBc at 100MHz, 2VP-P Equivalent OIP3 = 46dBm at 100MHz 1nV/√Hz Internal Op Amp Noise 6.2dB Noise Figure Differential Inputs and Outputs Rail-to-Rail Output Swing 80mA Supply Current (240mW) per Ampliﬁer 1.1V to 1.
PAGE 2
LTC6420-20 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Supply Voltage (V+ – V –) .........................................3.6V Input Current (Note 2)..........................................±10mA Operating Temperature Range (Note 3)...–40°C to 85°C Speciﬁed Temperature Range (Note 4) ....–40°C to 85°C Storage Temperature Range...................–65°C to 150°C Maximum Junction Temperature........................... 150°C Output Short Circuit Duration...........................
PAGE 3
LTC6420-20 DC ELECTRICAL CHARACTERISTICS + The l denotes the speciﬁcations which apply over the full operating – temperature range, otherwise speciﬁcations are at TA = 25°C. V = 3V, V = 0V, +IN = –IN = VOCM = 1.25V, ENABLE = 0V, No RL unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input/Output Characteristic GDIFF Gain VIN = ±100mV Differential l 20 20.4 dB ΔG Gain Matching Channel-to-Channel l ±0.1 ±0.
PAGE 4
LTC6420-20 AC ELECTRICAL CHARACTERISTICS+ The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. V = 3V, V– = 0V, VOCM = 1.25V, ENABLE = 0V, No RL unless otherwise noted. SYMBOL PARAMETER CONDITIONS ΔG Gain Matching f = 100MHz (Note 9) ΔP Phase Matching f = 100MHz MIN l TYP MAX UNITS ±0.1 ±0.25 dB ±0.1 deg Channel Separation (Note 8) f = 100MHz 80 dB –3dBBW –3dB Bandwidth 200mVP-P, OUT (Note 6) 1.8 GHz 0.
PAGE 5
LTC6420-20 TYPICAL PERFORMANCE CHARACTERISTICS Channel to Channel Group Delay Match vs Frequency Channel to Channel Phase Match vs Frequency 0.5 0.4 0.4 0.4 0.3 0.3 0.3 0.2 0.1 0.0 –0.1 –0.2 PHASE MATCH (deg) 0.5 GROUP DELAY MATCH (nsec) 0.5 0.2 0.1 0.0 –0.1 –0.2 0.2 0.1 0.0 –0.1 –0.2 –0.3 –0.3 –0.4 –0.4 –0.4 –0.5 –0.5 –0.3 100 FREQUENCY (MHz) 1000 2000 –0.
PAGE 6
LTC6420-20 TYPICAL PERFORMANCE CHARACTERISTICS NOISE FIGURE 2 eIN 1.35 RL = 87.5Ω PER OUTPUT +OUT 1.25 1.
PAGE 7
LTC6420-20 PIN FUNCTIONS +INA, –INA, –INB, +INB (Pins 1, 2, 5, 6): Differential Inputs of A and B channel respectively. V – (Pins 3, 4, 13, 14, 21): Negative Power Supply. All four pins, as well as the exposed back, must be connected to same voltage/ground. ENABLEA, ENABLEB (Pins 9, 18): Logic inputs. If low, the ampliﬁer is enabled. If high, the ampliﬁer is disabled and placed in a low power shutdown mode, making the ampliﬁer outputs high impedance. These pins are internally separate.
PAGE 8
LTC6420-20 APPLICATIONS INFORMATION Circuit Operation Input Impedance and Matching Each of the two channels of the LTC6420-20 is composed of a fully differential ampliﬁer with on chip feedback and output common mode voltage control circuitry. Differential gain and input impedance are set by 100Ω/1000Ω resistors in the feedback network. Small output resistors of 12.5Ω improve the circuit stability over various load conditions. The differential input impedance of the LTC6420-20 is 200Ω.
PAGE 9
LTC6420-20 APPLICATIONS INFORMATION matching network while the other input is connected to the same matching network and a source resistor. Because the return ratios of the two feedback paths are equal, the two outputs have the same gain and thus symmetrical swing. In general, the single-ended input impedance and termination resistor R T are determined by the combination of RS , RG and RF . For example, when RS is 50Ω, it is found that the single-ended input impedance is 202Ω and R T is 66.
PAGE 10
LTC6420-20 APPLICATIONS INFORMATION Figure 4a. Top Silkscreen of DC1299, Test Circuit A V+ R1 1.21k 1% TD4 VOCMA TD5 GND J1 +INA C22 0.1μF 1 2 C18 0.1μF C21 [1] T1 5 1 J2 –INA 1 • • 4 3 [2] C22 0.1μF 2 C19 0.1μF R5 C25 [2] 0.1μF 2 C22 [1] 20 V+A R7 OPT R9 [2] 1 2 3 J5 –INB C31 [1] 1 4 C30 0.1μF 2 T3 5 5 1 R10 C34 [2] 0.1μF 2 J7 +INB C30 0.1μF 1 2 • • 4 [2] C22 [1] V+ C14 4.7μF C15 1μF 6 R11 OPT R12 [2] R18 1k 1% C18 0.
PAGE 11
LTC6420-20 TYPICAL APPLICATIONS Test Circuit B, 4-Port Measurements (Only the Signal-Path Connections Are Shown) 0.1μF PORT 1 (50Ω) 1/2 AGILENT E5071C 200Ω RF 1000Ω RG 100Ω +INA RG 100Ω –INA 0.1μF – ++ ++ –– ROUT 12.5Ω +OUTA 37.4Ω ROUT 12.5Ω –OUTA 37.4Ω RF 1000Ω PORT 2 (50Ω) 0.1μF 0.1μF PORT 3 (50Ω) 1/2 AGILENT E5071C PORT 4 (50Ω) 642020 TA02 (B CHANNEL NOT SHOWN) Parallel ADC Drivers to Reduce Wideband Noise 3.3V C1 0.1μF C4 0.1μF R5 49.9Ω 1/2 LTC6420-20 + – 3.3V VIN R6 49.
PAGE 12
LTC6420-20 PACKAGE DESCRIPTION UDC Package 20-Lead Plastic QFN (3mm × 4mm) (Reference LTC DWG # 05-08-1742 Rev Ø) 0.75 ± 0.05 0.70 ±0.05 3.50 ± 0.05 2.10 ± 0.05 1.50 REF 3.00 ± 0.10 1.50 REF 19 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.25 × 45° CHAMFER 20 0.40 ± 0.10 2.65 ± 0.05 1 PIN 1 TOP MARK (NOTE 6) 1.65 ± 0.05 2 2.65 ± 0.10 4.00 ± 0.10 PACKAGE OUTLINE 2.50 REF 1.65 ± 0.10 0.25 ±0.05 0.50 BSC 2.50 REF (UDC20) QFN 1106 REV Ø 3.10 ± 0.05 4.50 ± 0.
PAGE 13
LTC6420-20 REVISION HISTORY (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 3/10 Changes to Applications 1 Changes to Related Parts 14 642020fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PAGE 14
LTC6420-20 TYPICAL APPLICATION Dual ADC Driver for Wideband Direct-Conversion Receivers 3V 3V C1 0.1μF C4 0.1μF R1 40.2Ω + – 1/2 VIN LTC6420-20 R2 40.