Datasheet

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LTC690/LTC691

LTC694/LTC695

ESCRIPTIO

Microprocessor

Supervisory Circuits

ITY

ADJ

OUT

10µF

≥ 7.5V

100µF

0.1µF

µP NMI

µP

POWER

POWER TO

CMOS RAM

I/O LINE

µP RESET

µP

SYSTEM

0.1µF

51k

10k

690 TA01

1086-5

MICROPROCESSOR RESET, BATTERY BACK-UP, POWER FAILURE

WARNING AND WATCHDOG TIMING ARE ALL IN A SINGLE CHIP

FOR MICROPROCESSOR SYSTEMS

LTC690/LTC691

LTC694/LTC695

BATT

PFI

WDI

RESET

PFO

OUT

GND

0.1µF

100Ω

RESET Output Voltage vs

Supply Voltage

■

UL Recognized File # E145770

■

Guaranteed

Reset Assertion at V

= 1V

■

1.5mA Maximum Supply Current

■

Fast (35ns Max) Onboard Gating of RAM Chip

Enable Signals

■

SO-8 and S16 Packaging

■

4.65V Precision Voltage Monitor

■

Power OK/Reset Time Delay: 50ms, 200ms

or Adjustable

■

Minimum External Component Count

■

1µA Maximum Standby Current

■

Voltage Monitor for Power-Fail

or Low-Battery Warning

■

Thermal Limiting

■

Performance Specified Over Temperature

■

Superior Upgrade for MAX690 Family

The LTC

690 family provides complete power supply

monitoring and battery control functions for microproces-

sor reset, battery back-up, CMOS RAM write protection,

power failure warning and watchdog timing. A precise

internal voltage reference and comparator circuit monitor

the power supply line. When an out-of-tolerance condition

occurs, the reset outputs are forced to active states and the

chip enable output unconditionally write-protects external

memory. In addition, the RESET output is guaranteed to

remain logic low even with V

as low as 1V.

The LTC690 family powers the active CMOS RAMs with a

charge pumped NMOS power switch to achieve low drop-

out and low supply current. When primary power is lost,

auxiliary power, connected to the battery input pin, powers

the RAMs in standby through an efficient PMOS switch.

For an early warning of impending power failure, the

LTC690 family provides an internal comparator with a

user-defined threshold. An internal watchdog timer is also

available, which forces the reset pins to active states when

the watchdog input is not toggled prior to a preset time-out

period.

■

Critical µP Power Monitoring

■

Intelligent Instruments

■

Battery-Powered Computers and Controllers

■

Automotive Systems

SUPPLY VOLTAGE (V)

RESET OUTPUT VOLTAGE (V)

= 25°C

EXTERNAL PULL-UP = 10µA

BATT

= 0V

690 TA02

, LTC and LT are registered trademarks of Linear Technology Corporation.

Summary of content (16 pages)

PAGE 1
LTC690/LTC691 LTC694/LTC695 Microprocessor Supervisory Circuits U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LTC®690 family provides complete power supply monitoring and battery control functions for microprocessor reset, battery back-up, CMOS RAM write protection, power failure warning and watchdog timing. A precise internal voltage reference and comparator circuit monitor the power supply line.
PAGE 2
LTC690/LTC691 LTC694/LTC695 W W W AXI U U ABSOLUTE RATI GS (Notes 1 and 2) Terminal Voltage VCC .................................................... – 0.3V to 6.0V VBATT ................................................ – 0.3V to 6.0V All Other Inputs .................. – 0.3V to (VOUT + 0.3V) Input Current VCC .............................................................. 200mA VBATT ............................................................ 50mA GND .................................................
PAGE 3
LTC690/LTC691 LTC694/LTC695 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the operating temperature range, otherwise specifications are at TA = 25°C. VCC = full operating range, VBATT = 2.8V, unless otherwise noted. PARAMETER CONDITONS MIN Operating Voltage Range VCC VBATT 4.75 2.00 VOUT Output Voltage IOUT = 1mA TYP MAX UNITS 5.50 4.25 V V Battery Back-Up Switching VCC – 0.05 VCC – 0.10 VCC – 0.005 VCC – 0.005 V V IOUT = 50mA VCC – 0.50 VCC – 0.
PAGE 4
LTC690/LTC691 LTC694/LTC695 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the operating temperature range, otherwise specifications are at TA = 25°C. VCC = full operating range, VBATT = 2.8V, unless otherwise noted. PARAMETER CONDITONS RESET, RESET, WDO, LOW LINE Output Short-Circuit Current (Note 4) Output Source Current WDI Input Threshold Logic Low Logic High WDI Input Current MIN TYP MAX 1 3 25 Output Sink Current 25 UNITS µA mA 0.8 V 4 –8 50 µA 1.3 1.
PAGE 5
LTC690/LTC691 LTC694/LTC695 W BLOCK DIAGRA M2 VBATT VOUT M1 VCC CHARGE PUMP – BATT ON C2 + LOW LINE + C1 – CE OUT 1.3V GND CE IN – C3 RESET OSC IN OSC OSC SEL WDI PFO + PFI RESET PULSE GENERATOR RESET TRANSITION DETECTOR WATCHDOG TIMER WDO 690 BD U U U PI FU CTIO S VCC: 5V Supply Input. The VCC pin should be bypassed with a 0.1µF capacitor. VOUT: Voltage Output for Backed Up Memory. Bypass with a capacitor of 0.1µF or greater.
PAGE 6
LTC690/LTC691 LTC694/LTC695 U U U PI FU CTIO S PFO: Power Failure Output from C3. PFO remains high when PFI is above 1.3V and goes low when PFI is below 1.3V. When VCC is lower than VBATT, C3 is shut down and PFO is forced low. RESET: Logic Output for µP Reset Control. Whenever VCC falls below either the reset voltage threshold (4.65V, typically) or VBATT, RESET goes active low.
PAGE 7
LTC690/LTC691 LTC694/LTC695 U W TYPICAL PERFOR A CE CHARACTERISTICS 2.80 1.308 VCC = 5V VBATT = 2.8V TA = 25°C OUTPUT VOLTAGE (V) 4.95 VCC = 5V VCC = 0V VBATT = 2.8V TA = 25°C 4.90 SLOPE = 5Ω 4.85 1.306 PFI INPUT THRESHOLD (V) 5.00 OUTPUT VOLTAGE (V) Power Failure Input Threshold vs Temperature VOUT vs IOUT VOUT vs IOUT 2.78 SLOPE = 125Ω 2.76 2.74 4.80 1.304 1.302 1.300 1.298 1.296 2.
PAGE 8
LTC690/LTC691 LTC694/LTC695 U W U UO APPLICATI S I FOR ATIO Microprocessor Reset The LTC690 family uses a bandgap voltage reference and a precision voltage comparator C1 to monitor the 5V supply input on VCC (see Block Diagram). When VCC falls below the reset voltage threshold, the RESET output is forced to active low state. The reset voltage threshold accounts for a 5% variation on VCC, so the RESET output becomes active low when VCC falls below 4.75V (4.65V typical).
PAGE 9
LTC690/LTC691 LTC694/LTC695 W U U UO APPLICATI S I FOR ATIO of external PNP transistor (Figure 2). If higher currents are needed with the LTC690 and LTC694, a high current Schottky diode can be connected from the VCC pin to the VOUT pin to supply the extra current. ANY PNP POWER TRANSISTOR size double layer capacitors, can be used for short term memory back-up instead of a battery.
PAGE 10
LTC690/LTC691 LTC694/LTC695 W U U UO APPLICATI S I FOR ATIO If battery connections are made through long wires, a 10Ω to 100Ω series resistor and a 0.1µF capacitor are recommended to prevent any overshoot beyond VCC due to the lead inductance (Figure 4). OUT is an alternative signal to drive the CE, CS, or Write input of battery-backed up CMOS RAM. CE OUT can also be used to drive the Store or Write input of an EEPROM, EAROM or NOVRAM to achieve similar protection.
PAGE 11
LTC690/LTC691 LTC694/LTC695 W U UO 5V 0.1µF U APPLICATI S I FOR ATIO VCC VOUT VCC + LTC691 LTC695 0.1µF 10µF 62512 RAM CE OUT CS 20ns PROPAGATION DELAY VBATT CE IN RESET 3V GND GND FROM DECODER RESET TO µP 690 F06 Figure 6. A Typical Nonvolatile CMOS RAM Application 5V VCC 0.1µF VOUT VCC + 10µF LTC690 LTC694 62128 RAM CS1 0.1µF CS VBATT RESET GND 3V CS2 GND 690 F07 Figure 7. Write Protect for RAM with LTC690 or LTC694 VIN ≥ 7.
PAGE 12
LTC690/LTC691 LTC694/LTC695 U W U UO APPLICATI S I FOR ATIO of LT1086-5 (4.75V + 1.5V) and VHYSTERESIS = 850mV. VHYSTERESIS = 5V 5V R1 = 850V R3 VBATT Choose R3 = 300k and R1 = 51k. Also select R4 = 10k which is much smaller than R3.  51k (5V – 1.3V)51k 7.5V = 1.3V  1+ –  1.3V(310 k)   R2 R2 = 9.7kΩ, Choose nearest 5% resistor 10k and recalculate VL,  51k (5V – 1.3V)51k VL = 1.3V  1 + –  = 7.32V 1.3V(310k)   10k  51k 51k  VH = 1.3V  1 + +  = 8.151V  10k 300k  (7.32V – 6.
PAGE 13
LTC690/LTC691 LTC694/LTC695 W U U UO APPLICATI S I FOR ATIO The LTC691 and LTC695 provide an additional output (Watchdog Output, WDO) which goes low if the watchdog timer is allowed to time out and remains low until set high by the next transition on the WDI pin. WDO is also set high when VCC falls below the reset voltage threshold or VBATT. The LTC691 and LTC695 have two additonal pins OSC SEL and OSC IN, which allow reset active time and watchdog time-out period to be adjusted per Table 2.
PAGE 14
LTC690/LTC691 LTC694/LTC695 U W U UO APPLICATI S I FOR ATIO Table 2. LTC691 and LTC695 Reset Active Time and Watchdog Time-Out Selections WATCHDOG TIME-OUT PERIOD NORMAL (Short Period) OSC SEL OSC IN Low External Clock Input 1024 clks Low External Capacitor* 400ms •C 70pF Floating or High Floating or High Low Floating or High RESET ACTIVE TIME IMMEDIATELY AFTER RESET (Long Period) LTC691 4096 clks 512 clks 2048 clks 1.6 sec •C 70pF 200ms •C 70pF 800ms •C 70pF 1.6 sec 1.
PAGE 15
LTC690/LTC691 LTC694/LTC695 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. J8 Package 8-Lead CERDIP (Narrow 0.300, Hermetic) (LTC DWG # 05-08-1110) 0.300 BSC (0.762 BSC) CORNER LEADS OPTION (4 PLCS) 0.008 – 0.018 (0.203 – 0.457) 0.015 – 0.060 (0.381 – 1.524) 0.023 – 0.045 (0.584 – 1.143) HALF LEAD OPTION 0° – 15° 0.045 – 0.068 (1.143 – 1.727) FULL LEAD OPTION 0.405 (10.287) MAX 0.200 0.005 (5.080) (0.
PAGE 16
LTC690/LTC691 LTC694/LTC695 UO TYPICAL APPLICATI S Capacitor Back-Up with 74HC4016 Switch 5V 5V VCC VOUT LTC691 LTC695 R2 30k 13 7 20ns PROPAGATION DELAY CS A + CE IN 3V LOW LINE GND GND 100µF 62512 RAM A CS CE OUT LOW LINE VBATT 0.1µF 10µF VBATT 2 74HC4016 VCC + LTC691 LTC695 0.1µF 10 11 12 14 1 VOUT VCC 0.1µF 0.1µF R1 10k Write Protect for Additional RAMs 0.1µF CS B LTC690 TA03 VCC 62128 RAM B CS1 CS2 VCC 0.