Datasheet

LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
19
69921234fc
Basic Operation
The simplest and most accurate method to program the
LTC6992 is to use a single resistor, R
SET
, between the
SET and GND pins. The design procedure is a four step
process. After choosing the proper LTC6992 version and
POL bit setting, select the N
DIV
value and then calculate
the value for the R
SET
resistor.
Alternatively, Linear Technology offers the easy to use
TimerBlox Designer tool to quickly design any LTC6992
based circuit. Download the free TimerBlox Designer
software at www.linear.com/timerblox.
Step 1: Selecting the POL Bit Setting
Most applications will use POL = 0, resulting in a positive
transfer function. However, some applications may require
a negative transfer function, where increasing V
MOD
re-
duces the output duty cycle. For example, if the LTC6992
is used in a feedback loop, POL = 1 may be required to
achieve negative feedback.
Step 2: Selecting the LTC6992 Version
The difference between the LTC6992 versions is observed at
the endpoints of the duty cycle control range. Applications
that require the output to never stop oscillating should use
the LTC6992-2. On the other hand, if the output should be
allowed to rest at GND or V
+
(0% or 100% duty cycle),
select the LTC6992-1.
The LTC6992-3 and LTC6992-4 clamp the duty cycle at
only one end of the control range, allowing the output to
stop oscillating at the other extreme. If POL = 1 the clamp
will swap from low duty cycle to high, or vice-versa. Refer
to Table 2 and Figure 4 for assistance in selecting the
proper version.
Step 3: Selecting the N
DIV
Frequency Divider Value
As explained earlier, the voltage on the DIV pin sets the
DIVCODE which determines both the POL bit and the
N
DIV
value. For a given output frequency, N
DIV
should be
selected to be within the following range.
62.5kHz
f
OUT
≤ N
DIV
≤
1MHz
f
OUT
(1a)
applicaTions inForMaTion
To minimize supply current, choose the lowest N
DIV
value
(generally recommended). For faster start-up or decreased
jitter, choose a higher N
DIV
setting. Alternatively, use Table 1
as a guide to select the best N
DIV
value for the given ap-
plication.
With POL already chosen, this completes the selection of
DIVCODE. Use Table 1 to select the proper resistor divider
or V
DIV
/V
+
ratio to apply to the DIV pin.
Step 4: Calculate and Select R
SET
The final step is to calculate the correct value for R
SET
using the following equation.
R
SET
=
1MHz • 50k
N
DIV
• f
OUT
(1b)
Select the standard resistor value closest to the calculated
value.
Example: Design a PWM circuit that satisfies the following
requirements:
• f
OUT
= 20kHz
• Positive V
MOD
to duty cycle response
• Output can reach 100% duty cycle, but not 0%
• Minimum power consumption
Step 1: Selecting the POL Bit Setting
For positive transfer function (duty cycle increases with
V
MOD
), choose POL = 0.
Step 2: Selecting the LTC6992 Version
To limit the minimum duty cycle, but allow the maximum
duty cycle to reach 100%, choose LTC6992-4. (Note that
if POL = 1 the LTC6992-3 would be the correct choice.)
Step 3: Selecting the N
DIV
Frequency Divider Value
Choose an N
DIV
value that meets the requirements of
Equation (1a).
3.125 ≤ N
DIV
≤ 50
Potential settings for N
DIV
include 4 and 16. N
DIV
= 4 is
the best choice, as it minimizes supply current by us-