Datasheet

LTC6994-1/LTC6994-2
17
699412fb
applicaTions inForMaTion
Voltage-Controlled Delay
With one additional resistor, the LTC6994 output delay
can be manipulated by an external voltage. As shown in
Figure 10, voltage V
CTRL
sources/sinks a current through
R
MOD
to vary the I
SET
current, which in turn modulates
the delay as described in Equation (3):
t
DELAY
=
N
DIV
• R
MOD
50kΩ
•
1µs
1+
R
MOD
R
SET
–
V
CTRL
V
SET
(3)
Digital Delay Control
The control voltage can be generated by a DAC (digital-to-
analog converter), resulting in a digitally-controlled delay.
Many DACs allow for the use of an external reference. If
such a DAC is used to provide the V
CTRL
voltage, the V
SET
dependency can be eliminated by buffering V
SET
and using
it as the DAC’s reference voltage, as shown in Figure 11.
The DAC’s output voltage now tracks any V
SET
variation
and eliminates it as an error source. The SET pin cannot be
tied directly to the reference input of the DAC because the
current drawn by the DAC’s REF input would affect the delay.
I
SET
Extremes (Master Oscillator Frequency Extremes)
When operating with I
SET
outside of the recommended
1.25µA to 20µA range, the master oscillator operates
outside of the 62.5kHz to 1MHz range in which it is most
accurate.
The oscillator will still function with reduced accuracy for
I
SET
< 1.25µA. At approximately 500nA, the oscillator will
stop. Under this condition, the delay timing can still be
initiated, but will not terminate until I
SET
increases and
the master oscillator starts again.
At the other extreme, it is not recommended to
operate
the
master oscillator beyond 2MHz because the accuracy
of the DIV pin ADC will suffer.
LTC6994
IN
GND
SET
OUT
V
+
DIV
R1
C1
0.1µF
699412 F10
V
+
R2
R
SET
R
MOD
V
CTRL
699412 F11
LTC6994
IN
GND
SET
OUT
V
+
DIV
C1
0.1µF
R1
R2
V
+
R
MOD
R
SET
–
+
V
+
1/2
LTC6078
LTC1659
V
+
0.1µF
V
CC
REF
GND
V
OUT
µP
D
IN
CLK
CS/LD
N
DIV
• R
MOD
50kΩ
t
DELAY
=
D
IN
= 0 TO 4095
•
–
1+
R
MOD
R
SET
D
IN
4096
1µs
0.1µF
Figure 10. Voltage-Controlled Delay
Figure 11. Digitally Controlled Delay