Datasheet

LTM4644/LTM4644-1
26
Rev. F
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APPLICATIONS INFORMATION
Layout Checklist/Example
The high integration of LTM4644 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout consid
-
erations are still necessary.
•
Use large PCB copper areas for high current paths,
including V
IN1
to V
IN4
, GND, V
OUT1
to V
OUT4
. It helps to
minimize the PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capaci
-
tors next to the V
IN
, GND and V
OUT
pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put via directly on the pad, unless they are
capped or plated over.
• Use a separated SGND ground copper area for com
-
ponents connected to signal pins. Connect the SGND
to GND underneath the unit.
• For parallel modules, tie the V
OUT
, V
FB
, and COMP pins
together. Use an internal layer to closely connect these
pins together. The TRACK/SS pin can be tied a common
capacitor for regulator soft-start.
• Bring out
test
points on the signal pins for monitoring.
Figure 32 gives a good example of the recommended layout.
Figure 32. Recommended PCB Layout
C
OUT
C
OUT
C
OUT
C
IN
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