User's Manual

Doc Title Wireless Smart Audio Module-A98ML Specification
Number
WMB20180515
Version
0.4
Document No.: WMB20180428 Page 9 of 19
29 GPIOZ_6 I/O General purpose input output 3.3V
31 PWM_B O Pulse Width Modulation B 3.3V
33 PWM_D O Pulse Width Modulation C 3.3V
35 PWMAO_C O Pulse Width Modulation AO_C 3.3V
37 PWMAO_D O Pulse Width Modulation AO_D 3.3V
39 UART0_RXD I UART0 receive 3.3V
41 UART0_TXD O UART0 transmit 3.3V
43 GPIOAO_7 I/O General purpose input output 3.3V
45 GPIOAO_6 I/O General purpose input output 3.3V
47 PWMAO_A O Pulse Width Modulation AO_A 3.3V
49 I2C0_SDA I/O I2C0 bus data 3.3V
51 I2C0_SCL I/O I2C0 bus clock 3.3V
55 GPIOA_19 I/O General purpose input output 3.3V
57 ADC_CH0 I/IPU ADC input 1.8V
59 MCLK_C O Master clock C 3.3V
61 GPIOAO_13 I/O General purpose input output 3.3V
65 GPIOA_20 I/O General purpose input output 3.3V
67 USB_DM I/O USB data minus 3.3V
69 USB_DP I/O USB data plus 3.3V
71 USB_VBUS I USB voltage detection 5V
73 USB_ID I USB ID 1.8V
18 GPIOZ_5 I/O General purpose input output 3.3V
20 GPIOZ_1 I/O General purpose input output 3.3V
22 GPIOZ_0 I/O General purpose input output 3.3V
24 PWM_C I/O Pulse Width Modulation C 3.3V
26 GPIOZ_2 I/O General purpose input output 3.3V
30 UART1_RXD I UART1 receive 3.3V
32 UART1_TXD O UART1 transmit 3.3V
36 PDM_DIN3 I PDM input data 3 signal 3.3V
38 PDM_DIN1 I PDM input data 1 signal 3.3V
40 PDM_DIN2 I PDM input data 2 signal 3.3V
42 PDM_DCLK O PDM output clock 3.3V
44 PDM_DIN0 I PDM input data 0 signal 3.3V
48 TDMB_DIO1 I/O TDM B input and output data1 3.3V
52 TDMB_SCLK I/O TDM B bit clock 3.3V
56 TDMB_DIO0 I/O TDM B input and output data0 3.3V
60 TDMB_FS I/O TDM B L/R clock 3.3V
62 TDMC_DIO1 I/O TDM C input and output data1 3.3V
66 TDMC_DIO0 I/O TDM C input and output data0 3.3V
68 TDMC_FS I/O TDM C L/R clock 3.3V
70 TDMC_SCLK I/O TDM C bit clock 3.3V