Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 107
0: Mask
1: Pass.
13
R/W
0x0
I2S/PCM 1_GATING.
Gating Clock For I2S/PCM 1
0: Mask
1: Pass.
12
R/W
0x0
I2S/PCM 0_GATING.
Gating Clock For I2S/PCM 0
0: Mask
1: Pass.
11:9
/
/
/
8
R/W
0x0
THS_GATING.
Gating Clock For THS
0: Mask
1: Pass
7:6
/
/
/
5
R/W
0x0
PIO_GATING.
Gating Clock For PIO
0: Mask
1: Pass.
4:2
/
/
/
1
R/W
0x0
OWA_GATING.
Gating Clock For OWA
0: Mask
1: Pass.
0
R/W
0x0
AC_DIG_GATING.
Gating Clock For AC Digital
0: Mask
1: Pass
4.3.5.17. Bus Clock Gating Register3 (Default Value: 0x00000000)
Offset: 0x006C
Register Name: BUS_CLK_GATING_REG3
Bit
R/W
Default/Hex
Description
31:21
/
/
/
20
R/W
0x0
SCR_GATING.
Gating Clock For SCR
0: Mask
1: Pass
19
R/W
0x0
UART3_GATING.
Gating Clock For UART3
0: Mask
1: Pass.
18
R/W
0x0
UART2_GATING.
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