Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 163
4.6.4.16. Watchdog0 Configuration Register (Default Value: 0x00000001)
Offset:0xB4
Register Name: WDOG0_CFG_REG
Bit
R/W
Default/Hex
Description
31:2
/
/
/
1:0
R/W
0x1
WDOG0_CONFIG.
Watchdog0 generates a reset signal
00: /
01: To whole system
10: Only interrupt
11: /
4.6.4.17. Watchdog0 Mode Register (Default Value: 0x00000000)
Offset:0xB8
Register Name: WDOG0_MODE_REG
Bit
R/W
Default/Hex
Description
31:8
/
/
/
7:4
R/W
0x0
WDOG0_INTV_VALUE.
Watchdog0 Interval Value
Watchdog0 clock source is OSC24M / 750. If the clock source is turned off,
Watchdog 0 will not work.
0000: 16000 cycles (0.5s)
0001: 32000 cycles (1s)
0010: 64000 cycles (2s)
0011: 96000 cycles (3s)
0100: 128000 cycles (4s)
0101: 160000 cycles (5s)
0110: 192000 cycles (6s)
0111: 256000 cycles (8s)
1000: 320000 cycles (10s)
1001: 384000 cycles (12s)
1010: 448000 cycles (14s)
1011: 512000 cycles (16s)
others: /
3:1
/
/
/
0
R/W
0x0
WDOG0_EN.
Watchdog0 Enable.
0: No effect;
1: Enable watchdog0.
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