Owners manual

System

4.6.5. Programming Guidelines

4.6.5.1. Timer

Take making a Timer0 1ms delay for an example, 24M clock source, single mode and 2 pre-scale will be selected in the

instance.

writel(0x2EE0,TMR_0_INTV); //Set interval value

writel(0x94, TMR_0_CTRL); //Select Single mode,24MHz clock source,2 pre-scale

writel(readl(TMR_0_CTRL)|(1<<1), TMR_0_CTRL); //Set Reload bit

while((readl(TMR_0_CTRL)>>1)&1); //Waiting Reload bit turns to 0

writel(readl(TMR_0_CTRL)|(1<<0), TMR_0_CTRL); //Enable Timer0

4.6.5.2. Watchdog Reset

In the following instance making configurations for Watchdog: configurate clock source as 24M/750, configurate Interval

Value as 1s and configurate Watchdog Configuration as To whole system. This instance indicates that reset system after

1s.

writel(0x1, WDOG_CONFIG); //To whole system

writel(0x10, WDOG_MODE); //Interval Value set 1s

writel(readl(WDOG_MODE)|(1<<0), WDOG_MODE); //Enable Watchdog

4.6.5.3. Watchdog Restart

In the following instance making configurations for Watchdog: configurate clock source as 24M/750, configurate Interval

Value as 1s and configurate Watchdog Configuration as To whole system. In the following instance, if the time of other

codes is larger than 1s, watchdog will reset the whole system. If the sentence of restart watchdog is implemented inside

1s, watchdog will be restarted.

writel(0x1, WDOG_CONFIG); //To whole system

writel(0x10, WDOG_MODE); //Interval Value set 1s

writel(readl(WDOG_MODE)|(1<<0), WDOG_MODE); //Enable Watchdog

----other codes---

writel(readl(WDOG_CTRL)|(0xA57<<1)|(1<<0)，WDOG_CTRL); //Writel 0xA57 at Key Field and Restart Watchdog

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