Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 168
4.7.5.3. TWD Restart Register (Default Value: 0x00000000)
Offset: 0x0014
Register Name: TWD_RESTART_REG
Bit
R/W
Default/Hex
Description
31:28
/
/
/
27:16
WO
0x0
TWD_RESTART_KEYFILED.
Should be written at value 0xD14. Writing any other value in this field aborts
the write operation.
15:1
/
/
/
0
WO
0x0
TWD_RESTART_EN.
If writing ‘1’ in this bit, the value of Counter Compare Registers would
change.
0: No effect.
1: Restart enable.
4.7.5.4. TWD Low Counter Register (Default Value: 0x00000000)
Offset: 0x0020
Register Name: TWD_LOW_CNT_REG
Bit
R/W
Default/Hex
Description
31:0
RO
0x0
TWD_LOW_CNT.
The TWD low 32-bit counter.
4.7.5.5. TWD High Counter Register (Default Value: 0x00000000)
Offset: 0x0024
Register Name: TWD_HIGH_CNT_REG
Bit
R/W
Default/Hex
Description
31:0
RO
0x0
TWD_HIGH_CNT.
The TWD high 32-bit counter.
4.7.5.6. TWD Interval Value Register (Default Value: 0x00000000)
Offset: 0x0030
Register Name: TWD_INTV_VAL_REG
Bit
R/W
Default/Hex
Description
31:0
R/W
0x0
TWD_INTV_VAL.
The TWD interval value.
4.7.5.7. TWD Low Counter Compare Register (Default Value: 0x00000000)
Offset: 0x0040
Register Name: TWD_LOW_CNT_CMP_REG
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