Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 169
Bit
R/W
Default/Hex
Description
31:0
RO
0x0
TWD_LOW_CMP.
The TWD low 32-bit compare counter.
4.7.5.8. TWD High Counter Compare Register (Default Value: 0x00000000)
Offset: 0x0044
Register Name: TWD_HIGH_CNT_CMP_REG
Bit
R/W
Default/Hex
Description
31:0
RO
0x0
TWD_HIGH_CMP.
The TWD high 32-bit compare counter.
4.7.5.9. Secure Storage NV-Counter Register (Default Value: 0x00000000)
Offset: 0x0100
Register Name: SST_NV_CNT_REG
Bit
R/W
Default/Hex
Description
31:0
R/W
0x0
SST_NV_CNT.
This counter protects the trusted world Secure Storage file from replay
attacks.
4.7.5.10. Synchronize Data Counter Register 0 (Default Value: 0x00000000)
Offset: 0x0110
Register Name: SYN_DATA_CNT_REG0
Bit
R/W
Default/Hex
Description
31:0
R/W
0x0
SYN_DATA_CNT0.
This counter is used for synchronizing data stores against replay attacks.
4.7.5.11. Synchronize Data Counter Register 1 (Default Value: 0x00000000)
Offset: 0x0114
Register Name: SYN_DATA_CNT_REG1
Bit
R/W
Default/Hex
Description
31:0
R/W
0x0
SYN_DATA_CNT1.
This counter is used for synchronizing data stores against replay attacks.
4.7.5.12. Synchronize Data Counter Register 2 (Default Value: 0x00000000)
Offset: 0x0118
Register Name: SYN_DATA_CNT_REG2
Bit
R/W
Default/Hex
Description
31:0
R/W
0x0
SYN_DATA_CNT2.
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