Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 172
RTC_DEB_REG
0x170
RTC Debug Register
GPL_HOLD_OUTPUT_REG
0x180
GPL Hold Output Register
VDD_RTC_REG
0x190
VDD RTC Regulate Register
IC_CHARA_REG
0x1F0
IC Characteristic Register
4.8.3. RTC Register Description
4.8.3.1. LOSC Control Register (Default Value: 0x00004000)
Offset:0x0
Register Name: LOSC_CTRL_REG
Bit
R/W
Default/Hex
Description
31:16
W
0x0
KEY_FIELD.
Key Field. This field should be filled with 0x16AA, and then the bit 0 can be
written with the new value.
15
/
/
/
14
R/W
0x1
LOSC_AUTO_SWT_EN.
LOSC auto switch enable.
0: Disable, 1: Enable.
13:10
/
/
/
9
R/W
0x0
ALM_DDHHMMSS_ACCE.
ALARM DD-HH-MM-SS access.
After writing the ALARM DD-HH-MM-SS register, this bit is set and it will be
cleared until the real writing operation is finished.
8
R/W
0x0
RTC_HHMMSS_ACCE.
RTC HH-MM-SS access.
After writing the RTC HH-MM-SS register, this bit is set and it will be cleared
until the real writing operation is finished.
After writing the RTC YY-MM-DD register, the YY-MM-DD register will be
refreshed for at most one second.
7
R/W
0x0
RTC_YYMMDD_ACCE.
RTC YY-MM-DD access.
After writing the RTC YY-MM-DD register, this bit is set and it will be cleared
until the real writing operation is finished.
After writing the RTC YY-MM-DD register, the YY-MM-DD register will be
refreshed for at most one second.
6:4
/
/
/
3:2
R/W
0x0
EXT_LOSC_GSM.
External 32768Hz Crystal GSM.
00 low
01
10
11 high
1
/
/
/
confidential