Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 197
24
R/W
0x0
DMA6_HLAF_IRQ_PEND.
DMA 6 Half Package Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
23
/
/
/
22
R/W
0x0
DMA5_QUEUE_IRQ_PEND.
DMA 5 Queue End Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
21
R/W
0x0
DMA5_PKG_IRQ_ PEND
DMA 5 Package End Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
20
R/W
0x0
DMA5_HLAF_IRQ_PEND.
DMA 5 Half Package Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
19
/
/
/
18
R/W
0x0
DMA4_QUEUE_IRQ_PEND.
DMA 4 Queue End Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
17
R/W
0x0
DMA4_PKG_IRQ_ PEND
DMA 4 Package End Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
16
R/W
0x0
DMA4_HLAF_IRQ_PEND.
DMA 4 Half Package Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
15
/
/
/
14
R/W
0x0
DMA3_QUEUE_IRQ_PEND.
DMA 3 Queue End Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
13
R/W
0x0
DMA3_PKG_IRQ_ PEND
DMA 3 Package End Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
12
R/W
0x0
DMA3_HLAF_IRQ_PEND.
DMA 3 Half Package Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
11
/
/
/
10
R/W
0x0
DMA2_QUEUE_IRQ_PEND.
DMA 2 Queue End Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
9
R/W
0x0
DMA2_PKG_IRQ_ PEND
DMA 2 Package End Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
8
R/W
0x0
DMA2_HLAF_IRQ_PEND.
DMA 2 Half Package Transfer Interrupt Pending. Set 1 to the bit will clear it.
0: No effect, 1: Pending.
7
/
/
/
6
R/W
0x0
DMA1_QUEUE_IRQ_PEND.
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