Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 202
7
RO
0x0
DMA7_STATUS
DMA Channel 7 Status.
0: Idle
1: Busy
6
RO
0x0
DMA6_STATUS
DMA Channel 6 Status.
0: Idle
1: Busy
5
RO
0x0
DMA5_STATUS
DMA Channel 5 Status.
0: Idle
1: Busy
4
RO
0x0
DMA4_STATUS
DMA Channel 4 Status.
0: Idle
1: Busy.
3
RO
0x0
DMA3_STATUS
DMA Channel 3 Status.
0: Idle
1: Busy.
2
RO
0x0
DMA2_STATUS
DMA Channel 2 Status.
0: Idle,
1: Busy.
1
RO
0x0
DMA1_STATUS
DMA Channel 1 Status.
0: Idle,
1: Busy.
0
RO
0x0
DMA0_STATUS
DMA Channel 0 Status.
0: Idle,
1: Busy.
4.11.4.8. DMA Channel Enable Register (Default Value: 0x00000000)
Offset: 0x100+N*0x40+0x0(N=0~11)
Register Name: DMA_EN_REG
Bit
R/W
Default/Hex
Description
31:1
/
/
/
0
R/W
0x0
DMA_EN.
DMA Channel Enable
0: Disable
1: Enable.
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