Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 231
Bit
R/W
Default/Hex
Description
31:0
R/W
0
Task_Descriptor_Queue_Address
4.15.4.2. Crypto Engine Control Register
Offset: 0x04
Register Name:CE_CTR
Bit
R/W
Default/Hex
Description
31:19
/
/
/
18:16
R
x
DIE_ID
Die Bonding ID for CE_NS
15:3
/
/
/
2:0
R
x
DIE_ID
Die Bonding ID for CE_S
4.15.4.3. Crypto Engine Interrupt Control Register(Default Value: 0x00000000)
Offset: 0x08
Register Name: CE_ICR
Bit
R/W
Default/Hex
Description
31:1
/
/
/
0
R/W
0
Task chaining_interrupt_enable
0: interrupt disable
1: interrupt enable
4.15.4.4. Crypto Engine Interrupt Status Register(Default Value: 0x00000000)
Offset: 0x0C
Register Name: CE_ISR
Bit
R/W
Default/Hex
Description
31:1
/
/
/
0
R/W
0
Task chaining_End_Pending
0: busy
1: task end
It indicates that the processing of encrypt /signing or decrypt/verification
has been completed .
Notes: Write ‘1’ to clear it.
4.15.4.5. Crypto Engine Task Load Register(Default Value: 0x00000000)
Offset: 0x10
Register Name: CE_TLR
Bit
R/W
Default/Hex
Description
confidential