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H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 234
(6) Secure CPU and non-secure CPU support separately one task channel, every task channel has an interrupt enable
bit and an interrupt status bit.
(7) The enable bit of the interrupt register represents channel interrupt,the 31bit of the first word in the task
descriptor represents the interrupt enable of every task,only the two bits are 1 at the same time,the interrupt could
pend when the task is completed.
(8) SSK/HUK/RSSK in efuse directly links to CE,and Only CE in secure mode can read SSK/HUK/RSSK.
(9) CE in secure mode uses RSSK as key,The ciphertext of HDCP/EK/BSSK key in external memory is decrypted by
AES,the result writes in HDCP/EK/BSSK key memory of keysram.AES has only the writing privilege for the
keysram ,and to prevent the key leaked, the result only can be wrote in the keysram address when AES decrypt by
RSSK.
(10) For SHA1/SHA224/SHA256/SHA384/SHA512,It should be noted the sequence of the initial hash value.
SHA1/SHA224/SHA256/SHA384/SHA512 is the big-endian algorithm, within each word,the most significant bit is
stored in the left-most bit position.For example,the initial hash value of SHA1 in Fips180-2,H
(0)
shall consist of the
following five 32-bit words,in hex:
H
0
(0)
= 67452301
H
1
(0)
= efcdab89
H
2
(0)
= 98badcfe
H
3
(0)
= 10325476
H
4
(0)
= c3d2e1f0
High-order byte Low-order byte
address A address A+1
address increasing direction
Big-endian
MSB LSB
High-order byte Low-order byte
address A
address A+1
address increasing direction
little-endian
The default access mode of ARM is litter-endian.So When we write the initial value in the IV descriptor address,
according to the following array input sequence:
For SHA1:
unsigned char iv_sha1[20]={
0x67,0x45,0x23,0x01,0xef,0xcd,0xab,0x89,
0x98,0xba,0xdc,0xfe,0x10,0x32,0x54,0x76,
0xc3,0xd2,0xe1,0xf0};
Then:
IV descriptor address +0x0: 0x01234567
IV descriptor address +0x4: 0x89abcdef
IV descriptor address +0x8: 0xfedcba98
IV descriptor address +0xC: 0x76543210
IV descriptor address +0x10: 0xf0e1d2c3
For SHA224:
unsigned char iv_sha224[32]={
0xc1,0x05,0x9e,0xd8,0x36,0x7c,0xd5,0x07,
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