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System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 261
second interrupt, it will send hold key interrupt to the host; If the control Logic get the first interrupt, In a certain time
range (program can set), get second interrupt, it will send key down interrupt to the host; If the control logic only get
the second interrupt, doesn’t get the first interrupt, it will send already hold interrupt to the host.
The KEY_ADC have three mode, Normal Mode、Single Mode and Continue Mode. Normal mode is that the KEY_ADC will
report the result data of each convert all the time when the key is down. Single Mode is that the KEY_ADC will only
report the first convert result data when the key is down. Continue Mode is that the KEY_ADC will report one of 8*(N+1)
(N is program can set) sample convert result data when key is down.
The KEY_ADC is support four sample rate such as 250Hz、125Hz、62.5Hz and 32.25Hz, you can configure the value of
KEY_ADC_SAMPLE_RATE to select the fit sample rate.
4.20.3. KEY_ADC Register List
Module Name
Base Address
KEY_ADC
0x01C21800
Register Name
Offset
Description
KEY_ADC_CTRL
0x00
KEY_ADC Control Register
KEY_ADC_INTC
0x04
KEY_ADC Interrupt Control Register
KEY_ADC_INTS
0x08
KEY_ADC Interrupt Status Register
KEY_ADC_DATA
0x0C
KEY_ADC Data Register
4.20.4. KEY_ADC Register Description
4.20.4.1. KEY_ADC Control Register (Default Value: 0x01000168)
Offset: 0x00
Register Name: KEY_ADC_CTRL_REG
Bit
R/W
Default/Hex
Description
31: 24
R/W
0x1
FIRST_CONVERT_DLY.
ADC First Convert Delay setting, ADC conversion is delayed by n samples
23:22
R/W
0x0
Reserved to 0
21:20
/
/
/
19:16
R/W
0x0
CONTINUE_TIME_SELECT.
Continue Mode time select, one of 8*(N+1) sample as a valuable sample
data
15:14
/
/
/
13:12
R/W
0x0
KEY_MODE_SELECT.
Key Mode Select:
00: Normal Mode
01: Single Mode
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