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System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 263
ADC Hold Key IRQ Enable
0: Disable
1: Enable
1
R/W
0x0
ADC_KEYDOWN_EN
ADC Key Down Enable
0: Disable
1: Enable
0
R/W
0x0
ADC_DATA_IRQ_EN.
ADC Data IRQ Enable
0: Disable
1: Enable
4.20.4.3. KEY_ADC Interrupt Status Register (Default Value: 0x00000000)
Offset: 0x08
Register Name:KEY_ADC_INTS_REG
Bit
R/W
Default/Hex
Description
31:5
/
/
/
4
R/W
0x0
ADC_KEYUP_PENDING.
ADC Key up pending Bit
When general key pull up, it the corresponding interrupt is enabled.
0: No IRQ
1: IRQ Pending
Notes: Writing 1 to the bit will clear it and its corresponding interrupt if the
interrupt is enable
3
R/W
0x0
ADC_ALRDY_HOLD_PENDING.
ADC Already Hold Pending Bit
When hold key pull down and pull the general key down, if the
corresponding interrupt is enabled.
0: No IRQ
1: IRQ Pending
Notes: Writing 1 to the bit will clear it and its corresponding interrupt if the
interrupt is enable
2
R/W
0x0
ADC_HOLDKEY_PENDING.
ADC Hold Key pending Bit
When Hold key pull down, the status bit is set and the interrupt line is set if
the corresponding interrupt is enabled.
0: NO IRQ
1: IRQ Pending
Notes: Writing 1 to the bit will clear it and its corresponding interrupt if the
interrupt is enable.
1
R/W
0x0
ADC_KEYDOWN_PENDING.
ADC Key Down IRQ Pending Bit
When General key pull down, the status bit is set and the interrupt line is
set if the corresponding interrupt is enabled.
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