Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 270
AC_PR_CFG
AC Parameter Configuration Register (0X01F015C0)
LINEOUT_PA_GAT
0X00
LINEOUT PA Gating Control Register
LOMIXSC
0X01
Left Output Mixer Source Select Control Register
ROMIXSC
0X02
Right Output Mixer Source Select Control Register
DAC_PA_SCR
0X03
DAC Analog Enable And PA Source Control Register
LINEIN_GCTR
0X05
Linein Gain Control Register
MIC_GCTR
0X06
MIC1 And MIC2 Gain Control Register
PAEN_CTR
0X07
PA Enable And LINEOUT Control Register
LINEOUT_VOLC
0X09
LINEOUT Volume Control Register
MIC2G_LINEOUT_CTR
0X0A
MIC2 Boost And LINEOUT Enable Control Register
MIC1G_MICBAIS_CTR
0X0B
MIC1 Boost And MICBIAS Control Register
LADCMIXSC
0X0C
Left ADC Mixer Source Control Register
RADCMIXSC
0X0D
Right Mixer Source Control Register
RES_REG
0X0E
Reserved Register
ADC_AP_EN
0X0F
ADC Analog Part Enable Register
ADDA_APT0
0X10
ADDA Analog Performance Turning0 Register
ADDA_APT1
0X11
ADDA Analog Performance Turning1 Register
ADDA_APT2
0X12
ADDA Analog Performance Turning2 Register
BIAS_DA16_CTR0
0X13
Bias & DA16 Calibration Control Register0
BIAS_DA16_CTR1
0x14
Bias & DA16 Calibration Control Register1
DA16CAL
0X15
DA16 Calibration Data Register
DA16VERIFY
0X16
DA16 Register Setting Data Register
BIASCALI
0X17
BIAS Calibration Data Register
BIASVERIFY
0X18
BIAS Register Setting Data Register
4.21.5. Audio Codec Register Description
4.21.5.1. 0x00 DAC Digital Part Control Register(Default Value: 0x00000000)
Offset: 0x00
Register Name: AC_DAC_DPC
Bit
R/W
Default/Hex
Description
31
R/W
0x0
EN_DAC
DAC Digital Part Enable
0 : Disable
1 : Enable
30:29
/
/
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28:25
R/W
0x0
MODQU
Internal DAC Quantization Levels
Levels=[7*(21+MODQU[3:0])]/128
Default levels=7*21/128=1.15
24:19
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/
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18
R/W
0x0
HPF_EN
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