Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 271
High Pass Filter Enable
0: Disable
1: Enable
17:12
R/W
0x0
DVOL
Digital volume control: DVC, ATT=DVC[5:0]*(-1.16Db)
64 steps, -1.16Db/step
11:1
/
/
/
0
R/W
0x0
HUB_EN
Audio Hub Enable
0: Disable
1: Enable
4.21.5.2. 0x04 DAC FIFO Control Register(Default Value: 0x00000F00)
Offset: 0x04
Register Name: AC_DAC_FIFOC
Bit
R/W
Default/Hex
Description
31:29
R/W
0X0
DAC_FS
Sample Rate Of DAC
000: 48KHz
010: 24KHz
100: 12KHz
110: 192KHz
001: 32KHz
011: 16KHz
101: 8KHz
111: 96KHz
44.1KHz/22.05KHz/11.025KHz can be supported by Audio PLL Configure Bit
28
R/W
0x0
FIR_VER
FIR Version
0: 64-Tap FIR; 1: 32-Tap FIR
27
/
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26
R/W
0x0
SEND_LASAT
Audio sample select when TX FIFO under run
0: Sending zero
1: Sending last audio sample
25:24
R/W
0x0
FIFO_MODE
For 24-bits transmitted audio sample:
00/10: FIFO_I[23:0] = {TXDATA[31:8]}
01/11: Reserved
For 16-bits transmitted audio sample:
00/10: FIFO_I[23:0] = {TXDATA[31:16], 8’b0}
01/11: FIFO_I[23:0] = {TXDATA[15:0], 8’b0}
23
/
/
/
22:21
R/W
0X0
DAC_DRQ_CLR_CNT
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