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System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 277
The audio sample number of writing into RXFIFO. When one sample is written
by Digital Audio Engine, the RX sample counter register increases by one. The
RX sample counter register can be set to any initial valve at any time. After
been updated by the initial value, the counter register should count on base
of this initial value
Notes: It is used for Audio/ Video Synchronization
4.21.5.10. 0x48 DAC Debug Register(Default Value: 0x00000000)
Offset: 0x48
Register Name: AC_DAC_DG
Bit
R/W
Default/Hex
Description
31:12
/
/
/
11
R/W
0X0
DAC_MODU_SELECT
DAC Modulator Debug
0: DAC Modulator Normal Mode
1: DAC Modulator Debug Mode
10:9
R/W
0X0
DAC_PATTERN_SELECT.
DAC Pattern Select
00: Normal (Audio Sample from TX FIFO)
01: -6 dB Sin wave
10: -60 dB Sin wave
11: silent wave
8
R/W
0X0
CODEC_CLK_SELECT
CODEC Clock Source Select
0: CODEC Clock from PLL
1: CODEC Clock from OSC (For Debug)
7
/
/
/
6
R/W
0X0
DA_SWP
DAC output channel swap enable
0:Disable
1:Enable
5:0
/
/
/
4.21.5.11. 0x4C ADC Debug Register(Default Value: 0x00000000)
Offset: 0x4C
Register Name: AC_ADC_DG
Bit
R/W
Default/Hex
Description
31:25
/
/
/
24
R/W
0X0
AD_SWP
ADC Output Channel Swap Enable (for digital filter)
0: Disable
1: Enable
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