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System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 284
4.21.5.21. 0x90 ADC DAP HPF Coef Register(Default Value: 0x00FF_FAC1)
Offset: 0x90
Register Name: AC_ADC_DAP_HPFC
Bit
R/W
Default/Hex
Description
31:27
/
/
/
26:0
R/W
0x0FFFAC1
ADAP_HPFC.
HPF coefficient setting (3.24fomat)
4.21.5.22. 0x94 ADC DAP Left Input Signal Low Average Coef Register(Default Value: 0x00051EB8)
Offset: 0x94
Register Name: AC_ADC_DAP_LINAC
Bit
R/W
Default/Hex
Description
31:27
/
/
/
26:0
R/W
0x0051EB8
ADAP_LINAC
Left input signal average filter coefficient to check noise or not (the
coefficientis 3.24 format 2s complement) always the same as the left output
signal average filter's
4.21.5.23. 0x98 ADC DAP Right Input Signal Low Average Coef Register(Default Value: 0x00051EB8)
Offset: 0x98
Register Name: AC_ADC_DAP_RNAC
Bit
R/W
Default/Hex
Description
31:27
/
/
/
26:0
R/W
0x0051EB8
ADAP_RINAC
Right input signal average filter coefficient to check noise or not (the
coefficientis 3.24 format 2s complement) always the same as the left output
signal average filter's
4.21.5.24. 0x9C ADC DAP Optimum Register(Default Value: 0x00000000)
Offset: 0x9C
Register Name: AC_ADC_DAP_OPT
Bit
R/W
Default/Hex
Description
31:11
/
/
/
10
R/W
0
Left energy default value setting(include the input and output)
0 : min
1 : max
9 :8
R/W
00
Left channel gain hystersis setting.
The different between target level and the signal level must larger than the
hystersis when the gain change.
00 : 0.4375db
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