Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 297
0 : disable
1 : enable
4
R/W
0x0
Control the drc to detect noise when ET enable
0 : disable
1 : enable
3
R/W
0x0
Signal function Select
0 : RMS filter
1 : Peak filter
When Signal function Select Peak filter, the RMS parameter is unused.
(AC_DRC_LRMSHAT / AC_DRC_LRMSLAT / AC_DRC_LRMSHAT /
AC_DRC_LRMSLAT)
When Signal function Select RMS filter, the Peak filter parameter is
unused.(AC_DRC_LPFHAT / AC_DRC_LPFLAT / AC_DRC_RPFHAT /
AC_DRC_RPFLAT / AC_DRC_LPFHRT / AC_DRC_LPFLRT / AC_DRC_RPFHRT /
AC_DRC_RPFLRT)
2
R/W
0x0
Delay function enable
0 : disable
1 : enable
When the Delay function enable is disable, the Signal delay time is unused.
1
R/W
0x0
DRC LT enable
0 : disable
1 : enable
When the DRC LT is disable the LT, Kl and OPL parameter is unused.
0
R/W
0x0
DRC ET enable
0 : disable
1 : enable
When the DRC ET is disable the ET, Ke and OPE parameter is unused.
4.21.5.75. 0x20C ADC DRC Left Peak Filter High Attack Time Coef Register(Default Value: 0x0000000B)
Offset: 0x20C
Register Name: AC_ADC_DRC_LPFHAT
Bit
R/W
Default/Hex
Description
15:11
/
/
/
10:0
R/W
0x000B
The left peak filter attack time parameter setting, which determine by the
equation that AT = 1-exp(-2.2Ts/ta). The format is 3.24. (1ms)
4.21.5.76. 0x210 ADC DRC Left Peak Filter Low Attack Time Coef Register(Default Value: 0x0000_77BF)
Offset: 0x210
Register Name: AC_ADC_DRC_LPFLAT
Bit
R/W
Default/Hex
Description
15:0
R/W
0x77BF
The left peak filter attack time parameter setting, which determine by the
equation that AT = 1-exp(-2.2Ts/ta). The format is 3.24. (1ms)
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