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System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 300
4.21.5.87. 0x23C ADC DRC Compressor Theshold High Setting Register(Default Value: 0x000006A4)
Offset: 0x23C
Register Name: AC_ADC_DRC_HCT
Bit
R/W
Default/Hex
Description
15:0
R/W
0x06A4
The compressor threshold setting, which set by the equation that CTin =
-CT/6.0206. The format is 8.24 (-40dB)
4.21.5.88. 0x240 ADC DRC Compressor Slope High Setting Register(Default Value: 0x0000D3C0)
Offset: 0x240
Register Name: AC_ADC_DRC_LCT
Bit
R/W
Default/Hex
Description
15:0
R/W
0xD3C0
The compressor threshold setting, which set by the equation that CTin =
-CT/6.0206. The format is 8.24 (-40dB)
4.21.5.89. 0x244 ADC DRC Compressor Slope High Setting Register(Default Value: 0x00000080)
Offset: 0x244
Register Name: AC_ADC_DRC_HKC
Bit
R/W
Default/Hex
Description
15:13
/
/
/
13:0
R/W
0x0080
The slope of the compressor which determine by the equation that Kc = 1/R,
there, R is the ratio of the compressor, which always is interger. The format is
8.24. (2 : 1)
4.21.5.90. 0x248 ADC DRC Compressor Slope Low Setting Register(Default Value: 0x00000000)
Offset: 0x248
Register Name: AC_ADC_DRC_LKC
Bit
R/W
Default/Hex
Description
15:0
R/W
0x0000
The slope of the compressor which determine by the equation that Kc = 1/R,
there, R is the ratio of the compressor, which always is interger. The format is
8.24. (2 : 1)
4.21.5.91. 0x24C ADC DRC Compressor High Output at Compressor Threshold Register(Default Value:
0x0000F95B)
Offset: 0x24C
Register Name: AC_ADC_DRC_HOPC
Bit
R/W
Default/Hex
Description
15:0
R/W
0xF95B
The output of the compressor which determine by the equation OPC/6.0206
The format is 8.24 (-40dB)
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