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System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 304
4.21.5.107. 0x28C ADC DRC Smooth filter Gain High Attack Time Coef Register(Default Value: 0x00000002)
Offset: 0x28C
Register Name: AC_ADC_DRC_SFHAT
Bit
R/W
Default/Hex
Description
15:11
/
/
/
10:0
R/W
0x0002
The smooth filter attack time parameter setting, which determine by the
equation that AT = 1-exp(-2.2Ts/tr). The format is 3.24. (5ms)
4.21.5.108. 0x290 ADC DRC Smooth filter Gain Low Attack Time Coef Register(Default Value: 0x00005600)
Offset: 0x290
Register Name: AC_ADC_DRC_SFLAT
Bit
R/W
Default/Hex
Description
15:0
R/W
0x5600
The smooth filter attack time parameter setting, which determine by the
equation that AT = 1-exp(-2.2Ts/tr). The format is 3.24. (5ms)
4.21.5.109. 0x294 ADC DRC Smooth filter Gain High Release Time Coef Register(Default Value: 0x00000000)
Offset: 0x294
Register Name: AC_ADC_DRC_SFHRT
Bit
R/W
Default/Hex
Description
15:11
/
/
/
10:0
R/W
0x0000
The gain smooth filter release time parameter setting, which determine by the
equation that RT = 1-exp(-2.2Ts/tr). The format is 3.24. (200ms)
4.21.5.110. 0x298 ADC DRC Smooth filter Gain Low Release Time Coef Register(Default Value: 0x00000F04)
Offset: 0x298
Register Name: AC_ADC_DRC_SFLRT
Bit
R/W
Default/Hex
Description
15:0
R/W
0x0F04
The gain smooth filter release time parameter setting, which determine by the
equation that RT = 1-exp(-2.2Ts/tr). The format is 3.24. (200ms)
4.21.5.111. 0x29C ADC DRC MAX Gain High Setting Register(Default Value: 0x0000FE56)
Offset: 0x29C
Register Name: AC_ADC_DRC_MXGHS
Bit
R/W
Default/Hex
Description
15:0
R/W
0xFE56
The max gain setting which determine by equation MXG/6.0206. The format is
8.24 and must -20dB <MXG< 30dB (-10dB)
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