Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 305
4.21.5.112. 0x2A0 ADC DRC MAX Gain Low Setting Register(Default Value: 0x0000CB0F)
Offset: 0x2A0
Register Name: AC_ADC_DRC_MXGLS
Bit
R/W
Default/Hex
Description
15:0
R/W
0xCB0F
The max gain setting which determine by equation MXG/6.0206. The format is
8.24 and must -20dB <MXG < 30dB (-10dB)
4.21.5.113. 0x2A4 ADC DRC MIN Gain High Setting Register(Default Value: 0x0000F95B)
Offset: 0x2A4
Register Name: AC_ADC_DRC_MNGHS
Bit
R/W
Default/Hex
Description
15:0
R/W
0xF95B
The min gain setting which determine by equation MXG/6.0206. The format is
8.24 and must -60dB ≤MNG ≤ -30dB (-40dB)
4.21.5.114. 0x2A8 ADC DRC MIN Gain Low Setting Register(Default Value: 0x00002C3F)
Offset: 0x2A8
Register Name: AC_ADC_DRC_MNGLS
Bit
R/W
Default/Hex
Description
15:0
R/W
0x2C3F
The min gain setting which determine by equation MNG/6.0206. The format is
8.24 and must -60dB ≤MNG ≤ -30dB (-40dB)
4.21.5.115. 0x2AC ADC DRC Expander Smooth Time High Coef Register(Default Value: 0x00000000)
Offset: 0x2AC
Register Name: AC_ADC_DRC_EPSHC
Bit
R/W
Default/Hex
Description
10:0
R/W
0x0000
The gain smooth filter release and attack time parameter setting in expander
region, which determine by the equation that RT = 1-exp(-2.2Ts/tr). The format
is 3.24. (30ms)
4.21.5.116. 0x2B0 ADC DRC Expander Smooth Time Low Coef Register(Default Value: 0x0000640C)
Offset: 0x2B0
Register Name: AC_ADC_DRC_EPSLC
Bit
R/W
Default/Hex
Description
15:0
R/W
0x640C
The gain smooth filter release and attack time parameter setting in expander
region, which determine by the equation that RT = 1-exp(-2.2Ts/tr). The format
is 3.24. (30ms)
confidential