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H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 306
4.21.5.117. 0x2B8 ADC DRC HPF Gain High Coef Register(Default Value: 0x00000100)
Offset: 0x2B8
Register Name: AC_ADC_DRC_HPFHGAIN
Bit
R/W
Default/Hex
Description
15:11
/
/
/
10:0
R/W
0x0100
The gain of the hpf coefficient setting which format is 3.24.(gain = 1)
4.21.5.118. 0x2BC ADC DRC HPF Gain Low Coef Register(Default Value: 0x00000000)
Offset: 0x2BC
Register Name: AC_ADC_DRC_HPFLGAIN
Bit
R/W
Default/Hex
Description
15:0
R/W
0x0000
The gain of the hpf coefficient setting which format is 3.24.(gain = 1)
4.21.6. Audio Codec Analog Part Register Description
4.21.6.1. AC Parameter Configuration Register (Default Value: 0x00000000)
Address: 0X01F015C0
Register Name: AC_PR_CFG
Bit
R/W
Default/Hex
Description
31:29
/
/
/
28
R/W
0X1
AC_PR_RST
AC_PR Reset
0: Assert
1: De-assert
27:25
/
/
/
24
R/W
0X0
AC_PR_RW
AC_PR Read Or Write
0: read
1: write
23:21
/
/
/
20:16
R/W
0X0
AC_PR _ADDR
AC_PR Address [4:0]
15:8
R/W
0X0
ADDA_PR _WDAT
ADDA_PR Write Data [7:0]
7:0
R/W
0X0
ADDA_PR _RDAT
ADDA_PR Read Data [7:0]
Note ： The address of this Register is 0X01F015C0，using this register to configure the AC_PR register.
Reset：Reset signal；
ADDR[4:0] ：AC_PR Address；
W/R：Write/Read Enable；
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