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System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 312
PA ANTI-POP Time Control
000: 131ms
001: 262ms
010: 393ms
011: 524ms
100: 655ms
101: 786ms
110: 917ms
111: 1048ms
4.21.6.15. 0x0F ADC Analog Part Enable Register(Default Value: 0x03)
Offset:0x0F
Register Name: ADC_AP_EN
Bit
R/W
Default/Hex
Description
7
R/W
0x0
ADCREN
ADC Right Channel Enable
0-Disable; 1-Enable
6
R/W
0x0
ADCLEN
ADC Left Channel Enable
0-Disable; 1-Enable
5:3
/
/
/
2:0
R/W
0x3
ADCG
ADC Input Gain Control
From -4.5dB to 6dB, 1.5dB/step default is 0dB
4.21.6.16. 0x10 ADDA Analog Performance Turning 0 Register(Default Value: 0x55)
Offset:0x10
Register Name: ADDA_APT0
Bit
R/W
Default/Hex
Description
7:6
R/W
0x1
OPDRV_OPCOM_CUR.
OPDRV/OPCOM output stage current setting
5:4
R/W
0x1
OPADC1_BIAS_CUR.
OPADC1 Bias Current Select
3:2
R/W
0x1
OPADC2_BIAS_CUR.
OPADC2 Bias Current Select
1:0
R/W
0x1
OPAAF_BIAS_CUR.
OPAAF in ADC Bias Current Select
4.21.6.17. 0x11 ADDA Analog Performance Turning 1 Register(Default Value: 0x45)
Offset:0x11
Register Name: ADDA_APT1
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