Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 317
PG _INT_CTL
0x200+1*0x20+0x10
PIO Interrupt Control Register
PG _INT_STA
0x200+1*0x20+0x14
PIO Interrupt Status Register
PG _INT_DEB
0x200+1*0x20+0x18
PIO Interrupt Debounce Register
4.22.2. Port Controller Register Description
4.22.2.1. PA Configure Register 0 (Default Value: 0x77777777)
Offset: 0x00
Register Name: PA_CFG0_REG
Bit
R/W
Default/Hex
Description
31
/
/
/
30:28
R/W
0x7
PA7_SELECT
000:Input 001:Output
010:SIM_CLK 011:Reserved
100:Reserved 101:Reserved
110:PA_EINT7 111:IO Disable
27
/
/
/
26:24
R/W
0x7
PA6_SELECT
000:Input 001:Output
010:SIM_PWREN 011: Reserved
100:Reserved 101:Reserved
110:PA_EINT6 111:IO Disable
23
/
/
/
22:20
R/W
0x7
PA5_SELECT
000:Input 001:Output
010:UART0_RX 011:PWM0
100:Reserved 101:Reserved
110:PA_EINT5 111:IO Disable
19
/
/
/
18:16
R/W
0x7
PA4_SELECT
000:Input 001:Output
010:UART0_TX 011:Reserved
100:Reserved 101:Reserved
110:PA_EINT4 111:IO Disable
15
/
/
/
14:12
R/W
0x7
PA3_SELECT
000:Input 001:Output
010:UART2_CTS 011:JTAG_DI
100:Reserved 101:Reserved
110:PA_EINT3 111:IO Disable
11
/
/
/
10:8
R/W
0x7
PA2_SELECT
000:Input 001:Output
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