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System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 333
4.22.2.31. PE Configure Register 3 (Default Value: 0x00000000)
Offset: 0x9C
Register Name: PE_CFG3_REG
Bit
R/W
Default/Hex
Description
31:0
/
/
/
4.22.2.32. PE Data Register (Default Value: 0x00000000)
Offset: 0xA0
Register Name: PE_DATA _REG
Bit
R/W
Default/Hex
Description
31:16
/
/
/
15:0
R/W
0x0
PE_DAT
If the port is configured as input, the corresponding bit is the pin state. If
the port is configured as output, the pin state is the same as the
corresponding bit. The read bit value is the value setup by software. If the
port is configured as functional pin, the undefined value will be read.
4.22.2.33. PE Multi-Driving Register 0 (Default Value: 0x55555555)
Offset: 0xA4
Register Name: PE_DRV0_REG
Bit
R/W
Default/Hex
Description
[2i+1:2i]
(i=0~15)
R/W
0x1
PE_DRV
PE[n] Multi-Driving SELECT (n = 0~15)
00: Level 0 01: Level 1
10: Level 2 11: Level 3
4.22.2.34. PE Multi-Driving Register 1 (Default Value: 0x00000000)
Offset: 0xA8
Register Name: PE_DRV1_REG
Bit
R/W
Default/Hex
Description
31:0
/
/
/
4.22.2.35. PE PULL Register 0 (Default Value: 0x00000000)
Offset: 0xAC
Register Name: PE_PULL0_REG
Bit
R/W
Default/Hex
Description
[2i+1:2i]
(i=0~15)
R/W
0x0
PE_PULL
PE[n] Pull-up/down Select (n = 0~15)
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