Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 335
110:Reserved 111:IO Disable
7
/
/
/
6:4
R/W
0x3
PF1_SELECT
000:Input 001:Output
010:SDC0_D0 011:JTAG_DI
100:Reserved 101:Reserved
110:Reserved 111:IO Disable
3
/
/
/
2:0
R/W
0x3
PF0_SELECT
000:Input 001:Output
010:SDC0_D1 011:JTAG_MS
100:Reserved 101:Reserved
110:Reserved 111:IO Disable
4.22.2.38. PF Configure Register 1 (Default Value: 0x00000000)
Offset: 0xB8
Register Name: PF_CFG1_REG
Bit
R/W
Default/Hex
Description
31:0
/
/
/
4.22.2.39. PF Configure Register 2(Default Value: 0x00000000)
Offset: 0xBC
Register Name: PF_CFG2_REG
Bit
R/W
Default/Hex
Description
31:0
/
/
/
4.22.2.40. PF Configure Register 3(Default Value: 0x00000000)
Offset: 0xC0
Register Name: PF_CFG3_REG
Bit
R/W
Default/Hex
Description
31:0
/
/
/
4.22.2.41. PF Data Register (Default Value: 0x00000000)
Offset: 0xC4
Register Name: PF_DATA_REG
Bit
R/W
Default/Hex
Description
31:7
/
/
/
6:0
R/W
0x0
PF_DAT
If the port is configured as input, the corresponding bit is the pin state. If
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