Owners manual
H3
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 34
5.2.6.25. NDFC Read Data Status Control Register(Default Value: 0x01000000) .................................. 376
5.2.6.26. NDFC Read Data Status Register 0(Default Value: 0x00000000) ............................................ 376
5.2.6.27. NDFC Read Data Status Register 1(Default Value: 0x00000000) ............................................ 376
5.2.6.28. NDFC MBUS DMA Address Register(Default Value: 0x00000000) .......................................... 377
5.2.6.29. NDFC MBUS DMA Byte Counter Register(Default Value: 0x00000000) .................................. 377
5.3. SD/MMC .................................................................................................................................................... 378
5.3.1. Overview ........................................................................................................................................... 378
5.3.2. Block Diagram ................................................................................................................................... 379
5.3.3. SD/MMC Controller Timing Diagram ................................................................................................ 379
5.3.4. SD/MMC Controller Special Requirement ......................................................................................... 379
5.3.4.1. SD/MMC Pin List ....................................................................................................................... 379
5.3.5. Internal DMA Controller Description ................................................................................................ 380
5.3.5.1. IDMAC Descriptor Structure ...................................................................................................... 380
5.3.5.2. DES0 definition .......................................................................................................................... 381
5.3.5.3. DES1 definition .......................................................................................................................... 382
5.3.5.4. DES2 definition .......................................................................................................................... 382
5.3.5.5. DES3 definition .......................................................................................................................... 382
5.3.6. SD/MMC Register List ........................................................................................................................ 382
5.3.7. SD/MMC Register Description ........................................................................................................... 383
5.3.7.1. SD Global Control Register(Default Value: 0x00000300) .......................................................... 383
5.3.7.2. SD Clock Control Register(Default Value: 0x00000000) ............................................................ 384
5.3.7.3. SD Timeout Register (Default Value: 0xFFFFFF40) .................................................................... 385
5.3.7.4. SD Bus Width Register (Default Value: 0x00000000) ............................................................... 385
5.3.7.5. SD Block Size Register (Default Value: 0x00000200) ................................................................. 385
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