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System
H3 Datasheet(Revision1.2) Copyrigh 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 342
4.22.2.60. PA External Interrupt Status Register (Default Value: 0x00000000)
Offset: 0x214
Register Name: PA_EINT_STATUS_REG
Bit
R/W
Default/Hex
Description
31:24
/
/
/
[n]
(n=0~23)
R/W
0
EINT_STATUS
External INTn Pending Bit (n = 0~21)
0: No IRQ pending
1: IRQ pending
Write ‘1’ to clear
4.22.2.61. PA External Interrupt Debounce Register (Default Value: 0x00000000)
Offset: 0x218
Register Name: PA_EINT_DEB_REG
Bit
R/W
Default/Hex
Description
31:7
/
/
/
6:4
R/W
0
DEB_CLK_PRE_SCALE
Debounce Clock Pre-scale n
The selected clock source is prescaled by 2^n.
3:1
/
/
/
0
R/W
0
PIO_INT_CLK_SELECT
PIO Interrupt Clock Select
0: LOSC 32Khz
1: HOSC 24Mhz
4.22.2.62. PG External Interrupt Configure Register 0 (Default Value: 0x00000000)
Offset: 0x220
Register Name: PG_EINT_CFG0_REG
Bit
R/W
Default/Hex
Description
31:12
/
/
/
[4i+3:4i]
(i=0~7)
R/W
0
EINT_CFG
External INTn Mode (n = 0~7)
0x0: Positive Edge
0x1: Negative Edge
0x2: High Level
0x3: Low Level
0x4: Double Edge (Positive/ Negative)
Others: Reserved
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