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System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 344
31:14
/
/
/
[n]
(n=0~13)
R/W
0
EINT_STATUS
External INTn Pending Bit (n = 0~13)
0: No IRQ pending
1: IRQ pending
Write ‘1’ to clear
4.22.2.68. PG External Interrupt Debounce Register (Default Value: 0x00000000)
Offset: 0x238
Register Name: PG_EINT_DEB_REG
Bit
R/W
Default/Hex
Description
31:7
/
/
/
6:4
R/W
0
DEB_CLK_PRE_SCALE
Debounce Clock Pre-scale n
The selected clock source is prescaled by 2^n.
3:1
/
/
/
0
R/W
0
PIO_INT_CLK_SELECT
PIO Interrupt Clock Select
0: LOSC 32Khz
1: HOSC 24Mhz
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