Owners manual

System
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 347
100:Reserved 101:Reserved
110:S_PL_EINT0 111:IO Disable
4.23.2.2. PL Configure Register 1 (Default Value: 0x00007777)
Offset: 0x04
Register Name: PL_CFG1_REG
Bit
R/W
Default/Hex
Description
31:15
/
/
/
14:12
R/W
0x7
PL11_SELECT
000:Input 001:Output
010:S_CIR_RX 011:Reserved
100:Reserved 101:Reserved
110:S_PL_EINT11 111:IO Disable
11
/
/
/
10:8
R/W
0x7
PL10_SELECT
000:Input 001:Output
010:S_PWM 011:Reserved
100:Reserved 101:Reserved
110:S_PL_EINT10 111:IO Disable
7
/
/
/
6:4
R/W
0x7
PL9_SELECT
000:Input 001:Output
010:Reserved 011:Reserved
100:Reserved 101:Reserved
110:S_PL_EINT9 111:IO Disable
3
/
/
/
2:0
R/W
0x7
PL8_SELECT
000:Input 001:Output
010:Reserved 011:Reserved
100:Reserved 101:Reserved
110:S_PL_EINT8 111:IO Disable
4.23.2.3. PL Configure Register 2 (Default Value: 0x00000000)
Offset: 0x08
Register Name: PL_CFG2_REG
Bit
R/W
Default/Hex
Description
31:0
/
/
/
4.23.2.4. PL Configure Register 3 (Default Value: 0x00000000)
Offset: 0x0C
Register Name: PL_CFG3_REG
Bit
R/W
Default/Hex
Description
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