Owners manual
Memory
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 360
5.2.4. NDFC Operation Guide
NDFC_CLE
NDFC_CE#
NDFC_WE#
NDFC_RE
NDFC_ALE
NDFC_RB#
NDFC_IOx
00h
Addr(5 cycle)
30h
Data output
First Command
cmdio[22]
cmdio[7:0]
Address Cycle
cmdio[18:16]
cmdio[19]=1
Second Command
cmdio[24]
Wait RB Signal
cmdio[23]
Sequence Read
cmdio[20]=0
cmdio[25]=1
Page Command
cmdio[31:30]=2
Figure 5-12. Page Read Command Diagram
NDFC_CLE
NDFC_CE#
NDFC_WE#
NDFC_RE
NDFC_ALE
NDFC_RB#
NDFC_IOx
80h
Addr(5 cycle) Data Input
First Command
cmdio[22]
cmdio[7:0]
Address Cycle
cmdio[18:16]
cmdio[19]=1
Sequence Write
cmdio[20]=1
cmdio[25]=1
Page Command
cmdio[31:30]=2
Wait RB Signal
cmdio[23]
Figure 5-13. Page Program Diagram
confidential