Owners manual
Memory
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 369
Others: Reserved
Notes: 1 data block = 512 or 1024 bytes main field data
5.2.6.9. NDFC Data Counter Register(Default Value: 0x00000000)
Offset: 0x20
Register Name: NDFC_CNT
Bit
R/W
Default/Hex
Description
31:10
/
/
/
9:0
R/W
0
NDFC_DATA_CNT
Transfer Data Byte Counter
The length can be set from 1 byte to 1024 bytes. However, 1024 bytes is set
when it is zero.
5.2.6.10. NDFC Command IO Register(Default Value: 0x00000000)
Offset: 0x24
Register Name: NDFC_CMD
Bit
R/W
Default/Hex
Description
31:30
R/W
0
NDFC_CMD_TYPE
00: Common Command for normal operation
01: Special Command for Flash Spare Field Operation
10: Page Command for batch process operation
11: Reserved
29
R/W
0
NDFC_SEND_FOURTH_CMD
0: Don’t send third set command
1: Send it on the external memory’s bus
Notes:It is used for EF-NAND page read.
28
R/W
0
NDFC_SEND_THIRD_CMD
0: Don’t send third set command
1: Send it on the external memory’s bus
Notes:It is used for EF-NAND page read.
27
R/W
0
NDFC_ROW_ADDR_AUTO
Row Address Auto Increase for Page Command
0: Normal operation
1: Row address increasing automatically
26
R/W
0
NDFC_DATA_METHOD
Data swap method when the internal RAM and system memory
It is only active for Common Command and Special Command.
0: No action
1: DMA transfer automatically
It only is active when NDFC_RAM_METHOD is 1.
If this bit is set to 1, NDFC should setup DRQ to fetching data before output
to Flash or NDFC should setup DRQ to sending out to system memory after
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