Owners manual

Memory
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 373
5.2.6.15. NDFC ECC Status Register(Default Value: 0x00000000)
Offset: 0x38
Register Name: NDFC_ECC_ST
Bit
R/W
Default/Hex
Description
31:16
R
0
NDFC_PAT_FOUND
Special pattern (all 0x00 or all x0ff) Found Flag for 16 Data Blocks
0: No Found
1: Special pattern is found
When this field is ‘1’, this means that the special data is found for reading
external NAND flash. The register of NDFC_PAT_ID would indicates which
pattern is found.
15:0
R
0
NDFC_ECC_ERR
Error information bit of 16 Data Blocks
0: ECC can correct these error bits or there is no error bit
1: Error bits number beyond of ECC correction capability and can’t correct
them
Notes: The LSB of this register is corresponding the 1st ECC data block. 1 ECC
Data Block = 512 or 1024 bytes.
5.2.6.16. NDFC Enhanced Feature Register(Default Value: 0x00000000)
Offset: 0x3C
Register Name: NDFC_EFR
Bit
R/W
Default/Hex
Description
31:9
R/W
0
/
8
R/W
0
NDFC_WP_CTRL
NAND Flash Write Protect Control Bit
0: Write Protect is active
1: Write Protect is not active
Notes: When this bit is ‘0’, WP signal line is low level and external NAND
flash is on protected state.
7
/
/
/
6:0
R/W
0
NDFC_ECC_DEBUG
For the purpose of debugging ECC engine, special bits error are inserted
before writing external Flash Memory.
0: No error is inserted (ECC Normal Operation)
n: N bits error are inserted
5.2.6.17. NDFC Error Counter Register 0(Default Value: 0x0000_0000)
Offset: 0x40
Register Name: NDFC_ERR_CNT0
Bit
R/W
Default/Hex
Description
[8i+7:8i]
R
0
ECC_COR_NUM
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