Owners manual

Memory
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 402
In SDR mode,the higher of 16 bits indicate the CRC of all data.
5.3.7.36. SD Data0 CRC Register (Default Value: 0x00000000)
Offset: 0x0130
Register Name: DATA0_CRC_REG
Bit
R/W
Default/Hex
Description
31:0
R
0
DATA0_CRC
Data[0] CRC
CRC in data[0] from card/eMMC.
In 8bit DDR mode,the higher 16 bits indicate the CRC of even data,and the
lower 16bits indicate the CRC of odd data.
In 4 bit DDR mode,the higher of 16 bits indicate the CRC of odd data, ,and
the lower 16bits indicate the CRC of even data.
In SDR mode,the higher of 16 bits indicate the CRC of all data.
5.3.7.37. SD CRC Status Register (Default Value: 0x00000000)
Offset: 0x0134
Register Name:CRC_STA_REG
Bit
R/W
Default/Hex
Description
31:3
/
/
/
2:0
R
0
CRC_STA
CRC Status
CRC status from card/eMMC in write operation
Positive CRC status token:3’b010
Negative CRC status token:3’b101
5.3.7.38. SD FIFO Register (Default Value: 0x00000000)
Offset: 0x0200
Register Name: SD_FIFO_REG
Bit
R/W
Default/Hex
Description
31:0
R/W
0
TX/RX_FIFO
Data FIFO
confidential