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H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 428
14
R/W
0
TCON1_Vb_Int_Flag
Asserted during vertical no-display period every frame.
Write 0 to clear it.
13
/
/
/
12
R/W
0
TCON1_Line_Int_Flag
trigger when SY1 match the current TCON1 scan line
Write 0 to clear it.
11:0
/
0
/
7.2.5.3. TCON Global Interrupt Register1 (Default Value: 0x00000000)
Offset: 0x0008
Register Name: TCON_GINT1_REG
Bit
R/W
Default/Hex
Description
31:12
/
/
/
11:0
R/W
0
TCON1_Line_Int_Num
scan line for TCON1 line trigger(including inactive lines)
Setting it for the specified line for trigger1.
Note: SY1 is writable only when LINE_TRG1 disable.
7.2.5.4. TCON1 Control Register (Default Value: 0x00000000)
Offset: 0x090
Register Name: TCON1_CTL_REG
Bit
R/W
Default/Hex
Description
31
R/W
0
TCON1_En
0: disable
1: enable
30:9
/
/
/
8:4
R/W
0
Start_Delay
This is for DE1 and DE2
3:2
/
/
/
1
R/W
0
TCON1_Src_Sel
0: reserved
1: BLUE data(FIFO2 disable, RGB=0000FF)
0
/
/
/
7.2.5.5. TCON1 Basic Timing Register0 (Default Value: 0x00000000)
Offset: 0x094
Register Name: TCON1_BASIC0_REG
Bit
R/W
Default/Hex
Description
31:28
/
/
/
27:16
R/W
0
TCON1_XI
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