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H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 434
30
R/W
0
TCON_Gamma_En
0: disable
1: enable
29:0
/
/
/
7.2.7.2. TCON Global Interrupt Register0 (Default Value: 0x00000000)
Offset: 0x0004
Register Name: TCON_GINT0_REG
Bit
R/W
Default/Hex
Description
31
/
/
/
30
R/W
0
TCON1_Vb_Int_En
0: disable
1: enable
29
/
/
/
28
R/W
0
TCON1_Line_Int_En
0: disable
1: enable
27:15
/
/
/
14
R/W
0
TCON1_Vb_Int_Flag
Asserted during vertical no-display period every frame.
Write 0 to clear it.
13
/
/
/
12
R/W
0
TCON1_Line_Int_Flag
trigger when SY1 match the current TCON1 scan line
Write 0 to clear it.
11:0
/
0
/
7.2.7.3. TCON Global Interrupt Register1 (Default Value: 0x00000000)
Offset: 0x0008
Register Name: TCON_GINT1_REG
Bit
R/W
Default/Hex
Description
31:12
/
/
/
11:0
R/W
0
TCON1_Line_Int_Num
scan line for TCON1 line trigger(including inactive lines)
Setting it for the specified line for trigger 1.
Note: SY1 is writable only when LINE_TRG1 disable.
7.2.7.4. TCON1 Control Register (Default Value: 0x00000000)
Offset: 0x0090
Register Name: TCON1_CTL_REG
Bit
R/W
Default/Hex
Description
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