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H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 437
9:0
R/W
0
VSPW
vertical Sync Pulse Width (in lines)
Tvspw = (VSPW+1) * Th
Note: VT/2 > (VSPW+1)
7.2.7.11. TCON CEU Control Register (Default Value: 0x00000000)
Offset: 0x0100
Register Name: TCON_CEU_CTL_REG
Bit
R/W
Default/Hex
Description
31
R/W
0
CEU_en
0: bypass
1: enable
30:0
/
/
/
7.2.7.12. TCON CEU Coefficient Mul Register (Default Value: 0x00000000)
Offset: 0x0110+N*0x04
(N=0,1,2,4,5,6,8,9,10)
Register Name: TCON_CEU_COEF_MUL_REG
Bit
R/W
Default/Hex
Description
31:13
/
/
/
12:0
R/W
0
CEU_Coef_Mul_Value
signed 13bit value, range of (-16,16)
N=0: Rr
N=1: Rg
N=2: Rb
N=4: Gr
N=5: Gg
N=6: Gb
N=8: Br
N=9: Bg
N=10: Bb
7.2.7.13. TCON CEU Coefficient Add Register (Default Value: 0x00000000)
Offset: 0x011C+N*0x10
(N=0,1,2)
Register Name: TCON_CEU_COEF_ADD_REG
Bit
R/W
Default/Hex
Description
31:19
/
/
/
18:0
R/W
0
CEU_Coef_Add_Value
signed 19bit value, range of (-16384, 16384)
N=0: Rc
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