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H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 451
Phase 0
SPI_SCLK (Mode 0)
SPI_SCLK (Mode 2)
SPI_MOSI
SPI_MISO
SPI_SS
Sample MOSI/ MISO pin
Figure 8-2. SPI Phase 0 Timing Diagram
Phase 1
SPI_SCLK (Mode 1)
SPI_SCLK (Mode 3)
SPI_MOSI
SPI_MISO
SPI_SS
Sample MOSI/ MISO pin
Figure 8-3. SPI Phase 1 Timing Diagram
8.2.3. SPI Pin List
The direction of SPI pin is different in two work modes: Master Mode and Slave Mode.
Port Name
Width
Direction(M)
Direction(S)
Description
SPI_SCLK
1
OUT
IN
SPI Clock
SPI_MOSI
1
OUT
IN
SPI Master Output Slave Input Data Signal
SPI_MISO
1
IN
OUT
SPI Master Input Slave Output Data Signal
SPI_SS[3:0]
4
OUT
IN
SPI Chip Select Signal
8.2.4. SPI Register List
Module Name
Base Address
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